From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 2/2] drm/i915: fix up _wait_for macro Date: Thu, 28 Mar 2013 16:41:37 +0100 Message-ID: <20130328154136.GO2228@phenom.ffwll.local> References: <1364425405-1200-1-git-send-email-daniel.vetter@ffwll.ch> <1364425405-1200-2-git-send-email-daniel.vetter@ffwll.ch> <20130328110056.GK4469@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ea0-f181.google.com (mail-ea0-f181.google.com [209.85.215.181]) by gabe.freedesktop.org (Postfix) with ESMTP id 55A9BE5C4F for ; Thu, 28 Mar 2013 08:38:47 -0700 (PDT) Received: by mail-ea0-f181.google.com with SMTP id z10so3907591ead.26 for ; Thu, 28 Mar 2013 08:38:46 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20130328110056.GK4469@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Cc: Daniel Vetter , Intel Graphics Development , Thomas Gleixner , Jack Winter List-Id: intel-gfx@lists.freedesktop.org On Thu, Mar 28, 2013 at 01:00:56PM +0200, Ville Syrj=E4l=E4 wrote: > On Thu, Mar 28, 2013 at 12:03:25AM +0100, Daniel Vetter wrote: > > As Thomas Gleixner spotted, it's rather horrible racy: > > - We can miss almost a full tick, so need to compensate by 1 jiffy. > = > I have a feeling this is a rather common pattern, so I wonder > if [mu]secs_to_jiffies() should do the +1 already for everyone. > Or maybe there should be some other macros for specifying > timeouts that would do the +1. > = > > - We need to re-check the condition when having timed-out, since a > > the last check could have been before the timeout expired. E.g. when > > we've been preempted or a long irq happened. > > = > > Cc: Thomas Gleixner > > Reported-by: Jack Winter > > Cc: Jack Winter > > Signed-off-by: Daniel Vetter > = > Reviewed-by: Ville Syrj=E4l=E4 Merged both patches, thanks for the review. -Daniel > = > > --- > > drivers/gpu/drm/i915/intel_drv.h | 13 +++++++++++-- > > 1 file changed, 11 insertions(+), 2 deletions(-) > > = > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/in= tel_drv.h > > index c8c1979..9dcae4e 100644 > > --- a/drivers/gpu/drm/i915/intel_drv.h > > +++ b/drivers/gpu/drm/i915/intel_drv.h > > @@ -33,12 +33,21 @@ > > #include > > #include > > = > > +/** > > + * _wait_for - magic (register) wait macro > > + * > > + * Does the right thing for modeset paths when run under kdgb or simil= ar atomic > > + * contexts. Note that it's important that we check the condition agai= n after > > + * having timed out, since the timeout could be due to preemption or s= imilar and > > + * we've never had a chance to check the condition before the timeout. > > + */ > > #define _wait_for(COND, MS, W) ({ \ > > - unsigned long timeout__ =3D jiffies + msecs_to_jiffies(MS); \ > > + unsigned long timeout__ =3D jiffies + msecs_to_jiffies(MS) + 1; \ > > int ret__ =3D 0; \ > > while (!(COND)) { \ > > if (time_after(jiffies, timeout__)) { \ > > - ret__ =3D -ETIMEDOUT; \ > > + if (!(COND)) \ > > + ret__ =3D -ETIMEDOUT; \ > > break; \ > > } \ > > if (W && drm_can_sleep()) { \ > > -- = > > 1.7.11.7 > > = > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > = > -- = > Ville Syrj=E4l=E4 > Intel OTC -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch