From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 1/5] drm/i915: s/TRANSCONF/PCH_TRANSCONF/ Date: Fri, 3 May 2013 11:19:23 +0200 Message-ID: <20130503091923.GK5763@phenom.ffwll.local> References: <1367424197-29664-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f47.google.com (mail-wg0-f47.google.com [74.125.82.47]) by gabe.freedesktop.org (Postfix) with ESMTP id E4970E5C57 for ; Fri, 3 May 2013 02:16:18 -0700 (PDT) Received: by mail-wg0-f47.google.com with SMTP id e11so1358221wgh.26 for ; Fri, 03 May 2013 02:16:17 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: Daniel Vetter , Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Thu, May 02, 2013 at 03:12:07PM -0300, Paulo Zanoni wrote: > Hi > > 2013/5/1 Daniel Vetter : > > Every time I read hsw code I get completely confused about this. So > > call it what it is more explicitly. > > > > Also, add an LPT_TRANSCONF for the pch transcoder A and use it in > > lpt-only code, to really unconfuse me. > > > > Signed-off-by: Daniel Vetter > > --- > > drivers/gpu/drm/i915/i915_reg.h | 7 ++++--- > > drivers/gpu/drm/i915/i915_ums.c | 8 ++++---- > > drivers/gpu/drm/i915/intel_display.c | 30 +++++++++++++++--------------- > > 3 files changed, 23 insertions(+), 22 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index 95ae5cf..d06a571 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -4058,9 +4058,10 @@ > > #define TRANSDPLINK_M2(pipe) _PIPE(pipe, _TRANSA_DP_LINK_M2, _TRANSB_DP_LINK_M2) > > #define TRANSDPLINK_N2(pipe) _PIPE(pipe, _TRANSA_DP_LINK_N2, _TRANSB_DP_LINK_N2) > > > > -#define _TRANSACONF 0xf0008 > > -#define _TRANSBCONF 0xf1008 > > -#define TRANSCONF(plane) _PIPE(plane, _TRANSACONF, _TRANSBCONF) > > +#define _PCH_TRANSACONF 0xf0008 > > +#define _PCH_TRANSBCONF 0xf1008 > > +#define PCH_TRANSCONF(plane) _PIPE(plane, _PCH_TRANSACONF, _PCH_TRANSBCONF) > > +#define LPT_TRANSCONF _PCH_TRANSACONF /* lpt has only one transcoder */ > > Since we're already touching the macros, I need to point that we call > the argument "plane" but use the _PIPE macro, when it's actually a > transcoder :) Yeah, plane is wrong ;-) But I've opted for PIPE instead, since the disdinction between transcoder and pipe is only relevant on hsw cpu stuff, and I very much don't expect the pch to grow an eDP transcoder. Imo that helps quite a bit since the crtc->pipe mapping is fixed, but the transcoder stuff depends upon the configuration. Hence why I prefer pipe if possible. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch