From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH] drm/i915: fix Haswell pfit power well check
 v2
Date: Fri, 3 May 2013 18:22:27 +0200
Message-ID: <20130503162227.GN5763@phenom.ffwll.local>
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To: Paulo Zanoni <przanoni@gmail.com>
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On Fri, May 03, 2013 at 12:01:49PM -0300, Paulo Zanoni wrote:
> 2013/5/3 Mika Kuoppala <mika.kuoppala@linux.intel.com>:
> > Jesse Barnes <jbarnes@virtuousgeek.org> writes:
> >
> >> We can't read the pfit regs if the power well is off, so use the cached
> >> value.
> >>
> >> v2: re-add lost comment (Jesse)
> >>     make sure the crtc using the fitter is actually enabled (Jesse)
> >>
> >> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> >> ---
> >>  drivers/gpu/drm/i915/intel_display.c |    2 +-
> >>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >> index 6504337..6be34f2 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -5918,7 +5918,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
> >>                * sequence that's not yet available. Just in case desktop eDP
> >>                * on PORT D is possible on haswell, too. */
> >>               /* Even the eDP panel fitter is outside the always-on well. */
> >> -             if (I915_READ(PF_WIN_SZ(crtc->pipe)))
> >> +             if (crtc->config.pch_pfit.size && crtc->base.enabled)
> >>                       enable = true;
> >>       }
> >>
> >
> > Remove the now useless *dev_priv to remove compiler warning and then add
> >
> > Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> 
> Yay, dmesg is clean again with this patch + Daniel's patch 06 + my
> local patches which I'll resend today.
> 
> With the warn pointed by Mika removed:
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch