From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 3/4] drm/i915: set proper DPIO post divider
 for VGA on VLV v4
Date: Mon, 6 May 2013 22:50:29 +0200
Message-ID: <20130506205029.GJ5763@phenom.ffwll.local>
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To: Kenneth Graunke <kenneth@whitecape.org>
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On Mon, May 06, 2013 at 10:52:36AM -0700, Kenneth Graunke wrote:
> On 05/02/2013 10:48 AM, Jesse Barnes wrote:
> >Supposedly we should use the DAC divider for <300MHz pixel clocks, but as
> >that doesn't actually work as well as the high freq divider here in
> >practice, just use the high freq divider all the time.
> >
> >v2: remove unconditional write (Jesse)
> >     check for pixel rate properly (Jesse)
> >v3: give up, the DAC divider apparently doesn't work, and low res modes
> >     work ok (Jesse)
> >     remove debug msg (Jesse)
> >
> >Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> 
> VGA is broken with today's drm-intel-next-queued (3a2128bcac1ae).
> Applying this patch fixes it.  Thanks!
> 
> Tested-by: Kenneth Graunke <kenneth@whitecape.org>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch