From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 4/5] drm/i915: check the power well on i915_pipe_enabled Date: Tue, 7 May 2013 13:31:57 +0200 Message-ID: <20130507113157.GK5763@phenom.ffwll.local> References: <1367594140-4339-1-git-send-email-przanoni@gmail.com> <1367594140-4339-4-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ea0-f172.google.com (mail-ea0-f172.google.com [209.85.215.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 47C01E61A0 for ; Tue, 7 May 2013 04:28:54 -0700 (PDT) Received: by mail-ea0-f172.google.com with SMTP id r16so250285ead.31 for ; Tue, 07 May 2013 04:28:53 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1367594140-4339-4-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Fri, May 03, 2013 at 12:15:39PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > This fixes "unclaimed register" messages when the power well is > disabled and there's a GPU hang. How does this blow up in a gpu hang? Afaics pipe_enabled is mostly called in the vblank code, so this should blow up any time we call a vblank function on a disabled pipe ... Also yet another reason to hate the vblank code, the locking is horrible in here. -Daniel > > v2: Use the new intel_display_power_enabled(). > v3: Use the new domains for intel_display_power_enabled(). > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/i915_irq.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 03a31be..161101f 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -384,6 +384,10 @@ i915_pipe_enabled(struct drm_device *dev, int pipe) > enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, > pipe); > > + if (!intel_display_power_enabled(dev, > + POWER_DOMAIN_TRANSCODER(cpu_transcoder))) > + return false; > + > return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE; > } > > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch