From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 7/7] drm/i915: check for strange pfit pipe assignemnt on ivb/hsw Date: Tue, 4 Jun 2013 14:08:03 +0200 Message-ID: <20130604120803.GA15743@phenom.ffwll.local> References: <1370099783-20328-1-git-send-email-daniel.vetter@ffwll.ch> <1370099783-20328-8-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ea0-f171.google.com (mail-ea0-f171.google.com [209.85.215.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 6E0B7E5D30 for ; Tue, 4 Jun 2013 05:08:08 -0700 (PDT) Received: by mail-ea0-f171.google.com with SMTP id m14so115322eaj.30 for ; Tue, 04 Jun 2013 05:08:07 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: Daniel Vetter , Intel Graphics Development , Mika Kuoppala List-Id: intel-gfx@lists.freedesktop.org On Mon, Jun 03, 2013 at 02:08:33PM -0300, Paulo Zanoni wrote: > 2013/6/1 Daniel Vetter : > > Panel fitters on ivb/hsw are not created equal since not all of them > > support the new high-quality upscaling mode. To offset this the hw > > allows us to freely assign the pfits to pipes. > > > > Since our code currently doesn't support this we might fall over when > > taking over firmware state. So check for this case and WARN about it. > > We can then improve the code once we've hit this in the wild. Or once > > we decide to support the improved upscale modes, though that requires > > global arbitrage of modeset resources across crtcs. > > > > Suggested-by: Mika Kuoppala > > Cc: Mika Kuoppala > > Signed-off-by: Daniel Vetter > > --- > > drivers/gpu/drm/i915/intel_display.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > > index 432e699..2b6e141 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -5806,6 +5806,14 @@ static void ironlake_get_pfit_config(struct intel_crtc *crtc, > > if (tmp & PF_ENABLE) { > > pipe_config->pch_pfit.pos = I915_READ(PF_WIN_POS(crtc->pipe)); > > pipe_config->pch_pfit.size = I915_READ(PF_WIN_SZ(crtc->pipe)); > > + > > + /* We currently do not free assignements of panel fitters on > > + * ivb/hsw (since we don't use the higher upscaling modes which > > + * differentiates them) so just WARN about this case for now. */ > > + if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) { > > Or just check for IS_GEN7 or, to be future-proof, check for "gen >= 7" > since there's a higher chance that newer gens will be similar to gen 7 > instead of the previous ones. As discussed in private, I think the explicit list here is better. But checking for IS_GEN7 is a good idea - I didn't realize that vlv is already excluded here. So applied that little changed. > > Anyway: Reviewed-by: Paulo Zanoni Merged all patches from this series, thanks a lot for your critical review. It's not always fun, but it _does_ improve the patches by a lot ;-) Cheers, Daniel > > > + WARN_ON((tmp & PF_PIPE_SEL_MASK_IVB) != > > + PF_PIPE_SEL_IVB(crtc->pipe)); > > + } > > } > > } > > > > -- > > 1.7.11.7 > > > > > > -- > Paulo Zanoni -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch