From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 06/31] drm/i915: move shared_dpll into the pipe config Date: Fri, 7 Jun 2013 20:03:17 +0300 Message-ID: <20130607170316.GT5004@intel.com> References: <1370432073-27634-1-git-send-email-daniel.vetter@ffwll.ch> <1370432073-27634-7-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 22A66E5C6C for ; Fri, 7 Jun 2013 10:03:20 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1370432073-27634-7-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Wed, Jun 05, 2013 at 01:34:08PM +0200, Daniel Vetter wrote: > With the big sed-job prep work done this is now really simple. Since the pipe config is built up from scratch for modeset_pipes, aren't we losing track of which PLL we were using previously? We only unref the previous PLL for modeset_pipes in ironlake_crtc_mode_set() by which time we've replace the pipe config with the newly computed one. For disable_pipes we en up in ironlake_crtc_off() which will do the right thing since it still has the original pipe config to consult. > = > v2: Kill the funny whitespace spotted by Chris. > = > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/i915/intel_display.c | 10 +++++----- > drivers/gpu/drm/i915/intel_drv.h | 5 +++-- > 2 files changed, 8 insertions(+), 7 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index d95d813..b09c9a2 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -896,10 +896,10 @@ intel_crtc_to_shared_dpll(struct intel_crtc *crtc) > { > struct drm_i915_private *dev_priv =3D crtc->base.dev->dev_private; > = > - if (crtc->shared_dpll < 0) > + if (crtc->config.shared_dpll < 0) > return NULL; > = > - return &dev_priv->shared_dplls[crtc->shared_dpll]; > + return &dev_priv->shared_dplls[crtc->config.shared_dpll]; > } > = > /* For ILK+ */ > @@ -2967,7 +2967,7 @@ static void ironlake_pch_enable(struct drm_crtc *cr= tc) > sel =3D TRANSC_DPLLB_SEL; > break; > } > - if (intel_crtc->shared_dpll =3D=3D DPLL_ID_PCH_PLL_B) > + if (intel_crtc->config.shared_dpll =3D=3D DPLL_ID_PCH_PLL_B) > temp |=3D sel; > else > temp &=3D ~sel; > @@ -3055,7 +3055,7 @@ static void intel_put_shared_dpll(struct intel_crtc= *crtc) > WARN_ON(pll->active); > } > = > - crtc->shared_dpll =3D DPLL_ID_NONE; > + crtc->config.shared_dpll =3D DPLL_ID_NONE; > } > = > static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc= *crtc, u32 dpll, u32 fp) > @@ -3111,7 +3111,7 @@ static struct intel_shared_dpll *intel_get_shared_d= pll(struct intel_crtc *crtc, > return NULL; > = > found: > - crtc->shared_dpll =3D i; > + crtc->config.shared_dpll =3D i; > DRM_DEBUG_DRIVER("using pll %d for pipe %c\n", i, pipe_name(crtc->pipe)= ); > if (pll->active =3D=3D 0) { > DRM_DEBUG_DRIVER("setting up pll %d\n", i); > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/inte= l_drv.h > index 422b2ad..e0e5d55 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -241,6 +241,9 @@ struct intel_crtc_config { > * haswell. */ > struct dpll dpll; > = > + /* Selected dpll when shared or DPLL_ID_PRIVATE. */ > + enum intel_dpll_id shared_dpll; > + > int pipe_bpp; > struct intel_link_m_n dp_m_n; > = > @@ -305,8 +308,6 @@ struct intel_crtc { > = > struct intel_crtc_config config; > = > - /* We can share PLLs across outputs if the timings match */ > - enum intel_dpll_id shared_dpll; > uint32_t ddi_pll_sel; > = > /* reset counter value when the last flip was submitted */ > -- = > 1.7.11.7 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC