From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 03/31] drm/i915: lock down pch pll accouting some more
Date: Mon, 10 Jun 2013 13:11:45 +0300 [thread overview]
Message-ID: <20130610101145.GA5004@intel.com> (raw)
In-Reply-To: <20130607211332.GC22870@phenom.ffwll.local>
On Fri, Jun 07, 2013 at 11:13:32PM +0200, Daniel Vetter wrote:
> On Fri, Jun 07, 2013 at 11:46:08PM +0300, Ville Syrjälä wrote:
> > On Fri, Jun 07, 2013 at 10:03:20PM +0200, Daniel Vetter wrote:
> > > On Fri, Jun 07, 2013 at 07:32:56PM +0300, Ville Syrjälä wrote:
> > > > On Wed, Jun 05, 2013 at 01:34:05PM +0200, Daniel Vetter wrote:
> > > > > Before I start to make a complete mess out of this, crank up
> > > > > the paranoia level a bit.
> > > > >
> > > > > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> > > > > ---
> > > > > drivers/gpu/drm/i915/intel_display.c | 9 ++++++++-
> > > > > 1 file changed, 8 insertions(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > > > > index 56fb6ed..39e977f 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > > @@ -1440,6 +1440,7 @@ static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)
> > > > > }
> > > > >
> > > > > assert_pch_pll_enabled(dev_priv, pll, NULL);
> > > > > + WARN_ON(!pll->on);
> > > > > if (--pll->active)
> > > > > return;
> > > >
> > > > Maybe a WARN_ON(pll->on) near the end of ironlake_enable_pch_pll() too?
> > >
> > > At the very end we set on = true, and the only non-error early return
> > > (when the active refcount is > 0 to begin with) has alreay a
> > > WARN_ON(!pll->on). Shouldn't that be good enough?
> >
> > Well I was just thinking that since we have this dual bookeeping w/
> > active and on, maybe we want to warn if things go out of sync.
>
> Now I'm confused. I've tried to explain why I think we already have full
> checking of pll->on in enable_shared_dpll ... Can you maybe show in a diff
> where you'd want to add more?
Something like this:
if (pll->active++) {
WARN_ON(!pll->on);
assert_pch_pll_enabled(dev_priv, pll, NULL);
return;
}
+ WARN_ON(pll->on);
and maybe also:
+ assert_pch_pll_disabled(dev_priv, pll, NULL);
Or maybe just kill 'pll->on' as it seems totally redundant.
Also maybe we could move most of the asserts and WARNs to some
central location. Currently there are quite a few early return paths
from the pll enable/disable functions, and I don't think we perform the
same checks for all of the branches. So maybe we could just have one
function that would cross-check pll->on, pll->active and the real hardware
state. We could call said function just before and after
enable/disable_pch_pll().
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2013-06-10 10:11 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-05 11:34 [PATCH 00/31] shared pch display pll rework Daniel Vetter
2013-06-05 11:34 ` [PATCH 01/31] drm/i915: fix up pch pll handling in ->mode_set Daniel Vetter
2013-06-05 11:34 ` [PATCH 02/31] drm/i915: conditionally disable pch resources in ilk_crtc_disable Daniel Vetter
2013-06-05 11:34 ` [PATCH 03/31] drm/i915: lock down pch pll accouting some more Daniel Vetter
2013-06-07 16:32 ` Ville Syrjälä
2013-06-07 20:03 ` Daniel Vetter
2013-06-07 20:46 ` Ville Syrjälä
2013-06-07 21:13 ` Daniel Vetter
2013-06-10 10:11 ` Ville Syrjälä [this message]
2013-06-10 14:34 ` Daniel Vetter
2013-06-10 14:47 ` Ville Syrjälä
2013-06-10 15:28 ` [PATCH] " Daniel Vetter
2013-06-07 21:09 ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 04/31] drm/i915: s/pch_pll/shared_dpll/ Daniel Vetter
2013-06-05 11:34 ` [PATCH 05/31] drm/i915: switch crtc->shared_dpll from a pointer to an enum Daniel Vetter
2013-06-07 16:48 ` Ville Syrjälä
2013-06-07 21:10 ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 06/31] drm/i915: move shared_dpll into the pipe config Daniel Vetter
2013-06-07 17:03 ` Ville Syrjälä
2013-06-07 21:10 ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 07/31] drm/i915: refactor PCH_DPLL_SEL #defines Daniel Vetter
2013-06-05 11:34 ` [PATCH 08/31] drm/i915: hw state readout for shared pch plls Daniel Vetter
2013-06-07 17:23 ` Ville Syrjälä
2013-06-07 20:11 ` Daniel Vetter
2013-06-07 21:11 ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 09/31] drm/i915: consolidate ->num_shared_dplls assignement Daniel Vetter
2013-06-05 11:34 ` [PATCH 10/31] drm/i915: metadata for shared dplls Daniel Vetter
2013-06-05 11:34 ` [PATCH 11/31] drm/i915: scrap register address storage Daniel Vetter
2013-06-05 11:34 ` [PATCH 12/31] drm/i915: enable/disable hooks for shared dplls Daniel Vetter
2013-06-05 11:34 ` [PATCH 13/31] drm/i915: drop crtc checking from assert_shared_dpll Daniel Vetter
2013-06-05 11:34 ` [PATCH 14/31] drm/i915: display pll hw state readout and checking Daniel Vetter
2013-06-12 13:31 ` Damien Lespiau
2013-06-12 13:39 ` Ville Syrjälä
2013-06-12 13:49 ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 15/31] drm/i915: extract readout_hw_state from setup_hw_state Daniel Vetter
2013-06-12 13:32 ` Damien Lespiau
2013-06-12 14:26 ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 16/31] drm/i915: split up intel_modeset_check_state Daniel Vetter
2013-06-12 13:33 ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 17/31] drm/i915: WARN on lack of shared dpll Daniel Vetter
2013-06-12 13:38 ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 18/31] drm/i915: hw state readout and cross-checking for shared dplls Daniel Vetter
2013-06-12 15:04 ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 19/31] drm/i915: fix up pch pll enabling for pixel multipliers Daniel Vetter
2013-06-12 15:12 ` Damien Lespiau
2013-06-12 19:34 ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 20/31] drm/i915: simplify the reduced clock handling for pch plls Daniel Vetter
2013-06-13 11:26 ` Damien Lespiau
2013-06-13 11:35 ` Daniel Vetter
2013-06-13 12:32 ` Damien Lespiau
2013-06-13 14:33 ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 21/31] drm/i915: consolidate pch pll enable sequence Daniel Vetter
2013-06-24 14:30 ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 22/31] drm/i915: use sw tracked state to select shared dplls Daniel Vetter
2013-06-12 15:20 ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 23/31] drm/i915: duplicate intel_enable_pll into i9xx and vlv versions Daniel Vetter
2013-06-05 15:12 ` Jani Nikula
2013-06-05 22:52 ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 24/31] drm/i915: asserts for lvds pre_enable Daniel Vetter
2013-06-13 20:26 ` Imre Deak
2013-06-13 20:46 ` Daniel Vetter
2013-06-14 10:45 ` Imre Deak
2013-06-16 19:42 ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 25/31] drm/i915: move encoder pre enable hooks togther on ilk+ Daniel Vetter
2013-06-05 11:34 ` [PATCH 26/31] drm/i915: hw state readout for i9xx dplls Daniel Vetter
2013-06-05 11:34 ` [PATCH 27/31] drm/i915: move i9xx dpll enabling into crtc enable function Daniel Vetter
2013-06-05 15:13 ` Jani Nikula
2013-06-06 8:20 ` [PATCH] " Daniel Vetter
2013-06-14 16:02 ` [PATCH 27/31] " Imre Deak
2013-06-16 19:15 ` Daniel Vetter
2013-06-16 19:24 ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 28/31] drm/i915: s/pre_pll/pre/ on the lvds port " Daniel Vetter
2013-06-15 8:32 ` Imre Deak
2013-06-26 10:02 ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 29/31] drm/i915: clean up vlv ->pre_pll_enable and pll enable sequence Daniel Vetter
2013-06-06 8:22 ` [PATCH] " Daniel Vetter
2013-07-11 14:11 ` Imre Deak
2013-07-11 20:13 ` Daniel Vetter
2013-07-12 16:27 ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 30/31] drm/i915: Fix up cpt pixel multiplier " Daniel Vetter
2013-06-05 11:34 ` [PATCH 31/31] drm/i915: clear DPLL reg when disabling i9xx dplls Daniel Vetter
2013-06-07 17:46 ` [PATCH 00/31] shared pch display pll rework Ville Syrjälä
2013-06-10 15:57 ` Ville Syrjälä
2013-06-10 18:16 ` Daniel Vetter
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