From mboxrd@z Thu Jan 1 00:00:00 1970 From: Damien Lespiau Subject: Re: [PATCH 22/31] drm/i915: use sw tracked state to select shared dplls Date: Wed, 12 Jun 2013 16:20:11 +0100 Message-ID: <20130612152011.GI15338@strange.amr.corp.intel.com> References: <1370432073-27634-1-git-send-email-daniel.vetter@ffwll.ch> <1370432073-27634-23-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 52EACE5C26 for ; Wed, 12 Jun 2013 08:20:31 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1370432073-27634-23-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Wed, Jun 05, 2013 at 01:34:24PM +0200, Daniel Vetter wrote: > Just yet another prep step to be able to do all this up-front, before > we've set up any of the shared dplls in the new state. This will > eventually be useful for atomic modesetting. > > Signed-off-by: Daniel Vetter Reviewed-by: Damien Lespiau -- Damien > --- > drivers/gpu/drm/i915/intel_display.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 334f86a..4d2284e 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2999,7 +2999,7 @@ static void intel_put_shared_dpll(struct intel_crtc *crtc) > crtc->config.shared_dpll = DPLL_ID_NONE; > } > > -static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc, u32 dpll, u32 fp) > +static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc) > { > struct drm_i915_private *dev_priv = crtc->base.dev->dev_private; > struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc); > @@ -3029,8 +3029,8 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc, > if (pll->refcount == 0) > continue; > > - if (dpll == (I915_READ(PCH_DPLL(pll->id)) & 0x7fffffff) && > - fp == I915_READ(PCH_FP0(pll->id))) { > + if (memcmp(&crtc->config.dpll_hw_state, &pll->hw_state, > + sizeof(pll->hw_state)) == 0) { > DRM_DEBUG_KMS("CRTC:%d sharing existing %s (refcount %d, ative %d)\n", > crtc->base.base.id, > pll->name, pll->refcount, pll->active); > @@ -5660,7 +5660,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, > else > intel_crtc->config.dpll_hw_state.fp1 = fp; > > - pll = intel_get_shared_dpll(intel_crtc, dpll, fp); > + pll = intel_get_shared_dpll(intel_crtc); > if (pll == NULL) { > DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n", > pipe_name(pipe)); > -- > 1.7.11.7 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx