From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: Detect invalid scanout pitches Date: Mon, 24 Jun 2013 18:05:22 +0300 Message-ID: <20130624150522.GL5004@intel.com> References: <1371744860-20264-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 5A260E5EA9 for ; Mon, 24 Jun 2013 08:06:03 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1371744860-20264-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Jun 20, 2013 at 05:14:20PM +0100, Chris Wilson wrote: > Report back the user error of attempting to setup a CRTC with an invalid > framebuffer pitch. This is trickier than it should be as on gen4, there > is a restriction that tiled surfaces must have a stride less than 16k - > which is less than the largest supported CRTC size. > = > v2: Fix the limits for gen3 > v3: Move check into intel_framebuffer_init() and fix VLV limits. (vsyrjal= a) > = > References: https://bugs.freedesktop.org/show_bug.cgi?id=3D65099 > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/intel_display.c | 25 +++++++++++++++++++++---- > 1 file changed, 21 insertions(+), 4 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index 03a5ed0..ed84c57 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -9223,6 +9223,7 @@ int intel_framebuffer_init(struct drm_device *dev, > struct drm_mode_fb_cmd2 *mode_cmd, > struct drm_i915_gem_object *obj) > { > + int pitch_limit; > int ret; > = > if (obj->tiling_mode =3D=3D I915_TILING_Y) { > @@ -9236,10 +9237,26 @@ int intel_framebuffer_init(struct drm_device *dev, > return -EINVAL; > } > = > - /* FIXME <=3D Gen4 stride limits are bit unclear */ > - if (mode_cmd->pitches[0] > 32768) { > - DRM_DEBUG("pitch (%d) must be at less than 32768\n", > - mode_cmd->pitches[0]); > + if (INTEL_INFO(dev)->gen > 4 && !IS_VALLEYVIEW(dev)) { I believe Daniel wants to use >=3D for such gen checks, and I tend to agree that it would make things a bit easier to parse. > + pitch_limit =3D 32*1024; > + } else if (INTEL_INFO(dev)->gen > 3) { > + if (obj->tiling_mode) > + pitch_limit =3D 16*1024; > + else > + pitch_limit =3D 32*1024; > + } else if (INTEL_INFO(dev)->gen > 2) { > + if (obj->tiling_mode) > + pitch_limit =3D 8*1024; > + else > + pitch_limit =3D 16*1024; > + } else > + /* XXX DSPC is limited to 4k tiled */ > + pitch_limit =3D 8*1024; > + > + if (mode_cmd->pitches[0] > pitch_limit) { > + DRM_DEBUG("%s pitch (%d) must be at less than %d\n", > + obj->tiling_mode ? "tiled" : "linear", > + mode_cmd->pitches[0], pitch_limit); > return -EINVAL; > } > = > -- = > 1.8.3.1 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC