From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: pixel multiplier readout support for pch ports Date: Sun, 30 Jun 2013 21:25:38 +0200 Message-ID: <20130630192538.GR18285@phenom.ffwll.local> References: <1372355239-14755-1-git-send-email-daniel.vetter@ffwll.ch> <20130628102035.049dd858@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ea0-f180.google.com (mail-ea0-f180.google.com [209.85.215.180]) by gabe.freedesktop.org (Postfix) with ESMTP id 378B8E5C4D for ; Sun, 30 Jun 2013 12:25:39 -0700 (PDT) Received: by mail-ea0-f180.google.com with SMTP id k10so1672326eaj.39 for ; Sun, 30 Jun 2013 12:25:38 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20130628102035.049dd858@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: Daniel Vetter , Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Fri, Jun 28, 2013 at 10:20:35AM -0700, Jesse Barnes wrote: > On Thu, 27 Jun 2013 19:47:19 +0200 > Daniel Vetter wrote: > > > Now that we painstakingly track the shared pch dplls we can finally > > implement pixel mutliplier readout support for pch ports, too. > > > > v2: Undo the temporary hack to disable the sdvo pixel multiplier > > cross-checking. > > > > Cc: Imre Deak > > Cc: Jesse Barnes > > Signed-off-by: Daniel Vetter > > --- > > drivers/gpu/drm/i915/intel_display.c | 12 ++++++------ > > drivers/gpu/drm/i915/intel_sdvo.c | 3 --- > > 2 files changed, 6 insertions(+), 9 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > > index 04c2cab..16aacfa 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -5778,10 +5778,6 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc, > > > > ironlake_get_fdi_m_n_config(crtc, pipe_config); > > > > - /* XXX: Can't properly read out the pch dpll pixel multiplier > > - * since we don't have state tracking for pch clocks yet. */ > > - pipe_config->pixel_multiplier = 1; > > - > > if (HAS_PCH_IBX(dev_priv->dev)) { > > pipe_config->shared_dpll = crtc->pipe; > > } else { > > @@ -5796,6 +5792,11 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc, > > > > WARN_ON(!pll->get_hw_state(dev_priv, pll, > > &pipe_config->dpll_hw_state)); > > + > > + tmp = pipe_config->dpll_hw_state.dpll; > > + pipe_config->pixel_multiplier = > > + ((tmp & PLL_REF_SDVO_HDMI_MULTIPLIER_MASK) > > + >> PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT) + 1; > > } else { > > pipe_config->pixel_multiplier = 1; > > } > > @@ -8046,8 +8047,7 @@ intel_pipe_config_compare(struct drm_device *dev, > > PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_start); > > PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_end); > > > > - if (!HAS_PCH_SPLIT(dev)) > > - PIPE_CONF_CHECK_I(pixel_multiplier); > > + PIPE_CONF_CHECK_I(pixel_multiplier); > > > > PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, > > DRM_MODE_FLAG_INTERLACE); > > diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c > > index 2628d56..8415d6a 100644 > > --- a/drivers/gpu/drm/i915/intel_sdvo.c > > +++ b/drivers/gpu/drm/i915/intel_sdvo.c > > @@ -1370,9 +1370,6 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder, > > break; > > } > > > > - if(HAS_PCH_SPLIT(dev)) > > - return; /* no pixel multiplier readout support yet */ > > - > > WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier, > > "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", > > pipe_config->pixel_multiplier, encoder_pixel_multiplier); > > Yay > > Reviewed-by: Jesse Barnes Queued for -next, thanks for the review. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch