From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 34/35] hack: Make fifo underruns DRM_ERROR Date: Fri, 5 Jul 2013 20:39:40 +0300 Message-ID: <20130705173940.GH5004@intel.com> References: <1373014667-19484-1-git-send-email-ville.syrjala@linux.intel.com> <1373014667-19484-35-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id EE27AE5CC2 for ; Fri, 5 Jul 2013 10:39:43 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Jul 05, 2013 at 02:19:59PM -0300, Paulo Zanoni wrote: > 2013/7/5 : > > From: Ville Syrj=E4l=E4 > > > > Want to see them w/ debugs turned off. > = > And what about PCH FIFO underruns? Ideally we'd want this patch, and yes, other underrun types too. But I'm thinking that we don't want it before we have sufficient pixel rate/bandwidth/etc. checks in place. I'm sure someone would file a bug as soon as they see the error. > > --- > > drivers/gpu/drm/i915/i915_irq.c | 10 +++++----- > > 1 file changed, 5 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i91= 5_irq.c > > index 10554bf..a55a231 100644 > > --- a/drivers/gpu/drm/i915/i915_irq.c > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > @@ -1103,15 +1103,15 @@ static void ivb_err_int_handler(struct drm_devi= ce *dev) > > > > if (err_int & ERR_INT_FIFO_UNDERRUN_A) > > if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, = true)) > > - DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n"); > > + DRM_ERROR("Pipe A FIFO underrun\n"); > > > > if (err_int & ERR_INT_FIFO_UNDERRUN_B) > > if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, = true)) > > - DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n"); > > + DRM_ERROR("Pipe B FIFO underrun\n"); > > > > if (err_int & ERR_INT_FIFO_UNDERRUN_C) > > if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_C, = true)) > > - DRM_DEBUG_DRIVER("Pipe C FIFO underrun\n"); > > + DRM_ERROR("Pipe C FIFO underrun\n"); > > > > I915_WRITE(GEN7_ERR_INT, err_int); > > } > > @@ -1360,11 +1360,11 @@ static irqreturn_t ironlake_irq_handler(int irq= , void *arg) > > > > if (de_iir & DE_PIPEA_FIFO_UNDERRUN) > > if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, = true)) > > - DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n"); > > + DRM_ERROR("Pipe A FIFO underrun\n"); > > > > if (de_iir & DE_PIPEB_FIFO_UNDERRUN) > > if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, = true)) > > - DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n"); > > + DRM_ERROR("Pipe B FIFO underrun\n"); > > > > if (de_iir & DE_PLANEA_FLIP_DONE) { > > intel_prepare_page_flip(dev, 0); > > -- > > 1.8.1.5 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > = > = > = > -- = > Paulo Zanoni -- = Ville Syrj=E4l=E4 Intel OTC