From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 15/35] drm/i915: Print the watermark latencies during init Date: Wed, 31 Jul 2013 12:47:54 +0300 Message-ID: <20130731094754.GZ5004@intel.com> References: <1373014667-19484-1-git-send-email-ville.syrjala@linux.intel.com> <1373014667-19484-16-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 6E7C8E6C3A for ; Wed, 31 Jul 2013 02:48:10 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Jul 30, 2013 at 06:49:27PM -0300, Paulo Zanoni wrote: > 2013/7/5 : > > From: Ville Syrj=E4l=E4 > > > > Seeing the watermark latency values in dmesg might help sometimes. > > > > Signed-off-by: Ville Syrj=E4l=E4 > > --- > > drivers/gpu/drm/i915/intel_pm.c | 25 +++++++++++++++++++++++++ > > 1 file changed, 25 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/int= el_pm.c > > index 37919df..5687957 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -2392,6 +2392,24 @@ static void intel_fixup_cur_wm_latency(struct dr= m_device *dev, uint16_t wm[5]) > > wm[3] *=3D 2; > > } > > > > +static void intel_print_wm_latency(struct drm_device *dev, const uint1= 6_t wm[5]) > > +{ > > + int level; > > + > > + for (level =3D 0; level <=3D 4; level++) { > > + unsigned int latency =3D wm[level]; > > + > > + if (latency =3D=3D 0) > > + continue; > = > One of the cases that should be interesting to print is exactly when a > latency we expect to be non-zero is zero. Maybe you should do a simple > "switch" statement to get max_level depending on Gen number and print > everything from level 0 to max_level? Then if "latency =3D=3D 0" we could > even promote the message to a DRM_ERROR? Yeah could be done. OTOH if it really happens in the wild, we'd probably be looking at a bunch of new bug reports that we can't do anything about. > > + > > + if (level > 0) > > + latency *=3D 5; > > + > > + DRM_DEBUG_KMS(" WM%d latency %u (%u.%u usec)\n", > > + level, wm[level], latency / 10, latency %= 10); > > + } > > +} > > + > > static void intel_setup_wm_latency(struct drm_device *dev) > > { > > struct drm_i915_private *dev_priv =3D dev->dev_private; > > @@ -2405,6 +2423,13 @@ static void intel_setup_wm_latency(struct drm_de= vice *dev) > > > > intel_fixup_spr_wm_latency(dev, dev_priv->wm.spr_latency); > > intel_fixup_cur_wm_latency(dev, dev_priv->wm.cur_latency); > > + > > + DRM_DEBUG_KMS("Primary watermark latencies:\n"); > > + intel_print_wm_latency(dev, dev_priv->wm.pri_latency); > > + DRM_DEBUG_KMS("Sprite watermark latencies:\n"); > > + intel_print_wm_latency(dev, dev_priv->wm.spr_latency); > > + DRM_DEBUG_KMS("Cursor watermark latencies:\n"); > > + intel_print_wm_latency(dev, dev_priv->wm.cur_latency); > > } > > > > static void hsw_compute_wm_parameters(struct drm_device *dev, > > -- > > 1.8.1.5 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > = > = > = > -- = > Paulo Zanoni -- = Ville Syrj=E4l=E4 Intel OTC