From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 11/35] drm/i915: Add SNB/IVB support to intel_read_wm_latency Date: Mon, 5 Aug 2013 07:23:43 +0200 Message-ID: <20130805052343.GF22035@phenom.ffwll.local> References: <1373014667-19484-1-git-send-email-ville.syrjala@linux.intel.com> <1373014667-19484-12-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-we0-f173.google.com (mail-we0-f173.google.com [74.125.82.173]) by gabe.freedesktop.org (Postfix) with ESMTP id F31DBE5D09 for ; Sun, 4 Aug 2013 22:23:36 -0700 (PDT) Received: by mail-we0-f173.google.com with SMTP id x55so2064576wes.4 for ; Sun, 04 Aug 2013 22:23:36 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Jul 30, 2013 at 06:01:57PM -0300, Paulo Zanoni wrote: > 2013/7/5 : > > From: Ville Syrj=E4l=E4 > > > > SNB and IVB have slightly a different way to read out the > > watermark latency values. > > > > Signed-off-by: Ville Syrj=E4l=E4 > > --- > > drivers/gpu/drm/i915/intel_pm.c | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/int= el_pm.c > > index a2ca018..6ff89c6 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -2350,6 +2350,13 @@ static void intel_read_wm_latency(struct drm_dev= ice *dev, uint16_t wm[5]) > > wm[2] =3D (sskpd >> 12) & 0xFF; > > wm[3] =3D (sskpd >> 20) & 0x1FF; > > wm[4] =3D (sskpd >> 32) & 0x1FF; > > + } else if (INTEL_INFO(dev)->gen >=3D 6) { > > + uint32_t sskpd =3D I915_READ(MCH_SSKPD); > > + > > + wm[0] =3D (sskpd >> SSKPD_WM0_SHIFT) & SSKPD_WM_MASK; > > + wm[1] =3D (sskpd >> SSKPD_WM1_SHIFT) & SSKPD_WM_MASK; > > + wm[2] =3D (sskpd >> SSKPD_WM2_SHIFT) & SSKPD_WM_MASK; > > + wm[3] =3D (sskpd >> SSKPD_WM3_SHIFT) & SSKPD_WM_MASK; > = > My documentation is limited, but this seems at least consistent with > our current definitions. > = > I'd also vote to transform this into a "switch (INTEL_INFO(dev))" and > add a WARN in case Gen is not 6 or 7. I guess we can do that once all the stuff here (and maybe 1-2 new generations) have landed. > = > Anyway, the patch looks correct: Reviewed-by: Paulo Zanoni > Ok, I've pulled in all the patches Paulo has already reviewed and deemed good. I guess to continue we need to dig out the ilk docs for Paulo ;-) Thanks for the patches&review. -Daniel -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch