Updated drm-intel-testing

Jani Nikula
2018-11-22T15:30:49Z

Hi all,

It may be about time we update the process around drm-intel-testing, but
here goes anyway...

The following changes tagged drm-intel-testing-2018-11-22:

drm-intel-next-2018-11-22:
Changes outside i915:
- Connector property to limit max bpc (Radhakrishna)
- Fix LPE audio runtime PM and deinit (Ville)
- DP FEC prep work (Anusha)
- Mark pinned shmemfs pages as unevictable (Kuo-Hsin)
- Backmerge drm-next (Jani)

Inside i915:
- Revert OA UAPI change that lacks userspace (Joonas)
- Register macro cleanup (Jani)
- 32-bit build fixes on pin flags (Chris)
- Fix MG DP mode and PHY gating for HDMI (Imre)
- DP MST race, hpd and irq fixes (Lyude)
- Combo PHY fixes and cleanup (Imre, Lucas)
- Move display init and cleanup under modeset init and cleanup (José)
- PSR fixes (José)
- Subslice size fixes (Daniele)
- Abstract and clean up fixed point helpers (Jani)
- Plane input CSC for YUV to RGB conversion (Uma)
- Break long iterations for get/put shmemfs pages (Chris)
- Improve DDI encoder hw state readout sanity checks (Imre)
- Fix power well leaks for MST (José)
- Scaler fixes (Ville)
- Watermark fixes (Ville)
- Fix VLV/CHV DSI panel orientation readout (Ville)
- ICL rawclock fixes (Paulo)
- Workaround DMC power well request issues (Imre)
- Plane allocation fix (Maarten)
- Transcoder enum value/ordering robustness fixes (Imre)
- UTS_RELEASE build dependency fix (Hans Holmberg)

BR,
Jani.

--
Jani Nikula, Intel Open Source Graphics Center
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