From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 6/9] drm/i915: Allocate context objects from stolen
Date: Sat, 10 Aug 2013 11:25:46 +0200 [thread overview]
Message-ID: <20130810092546.GI31670@phenom.ffwll.local> (raw)
In-Reply-To: <1375969271-4331-6-git-send-email-chris@chris-wilson.co.uk>
On Thu, Aug 08, 2013 at 02:41:08PM +0100, Chris Wilson wrote:
> Once again, the CPU PAT bits are irrelevant when considering the GPU
> cacheing, and context objects are never accessed from the CPU or
> directly by userspace making them another ideal candidate to allocate
> from stolen memory.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
I think this will break hibernate, since over hibernate stolen get some
garbage. And userspace (and the gpu) probably don't expect garbage when
trying to restore a hw context.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_gem_context.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index a57d49a..498f8a0 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -141,6 +141,7 @@ create_hw_context(struct drm_device *dev,
> struct drm_i915_file_private *file_priv)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> + const int size = dev_priv->hw_context_size;
> struct i915_hw_context *ctx;
> int ret;
>
> @@ -149,7 +150,9 @@ create_hw_context(struct drm_device *dev,
> return ERR_PTR(-ENOMEM);
>
> kref_init(&ctx->ref);
> - ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
> + ctx->obj = i915_gem_object_create_stolen(dev, size);
> + if (ctx->obj == NULL)
> + ctx->obj = i915_gem_alloc_object(dev, size);
> if (ctx->obj == NULL) {
> kfree(ctx);
> DRM_DEBUG_DRIVER("Context object allocated failed\n");
> --
> 1.8.4.rc1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2013-08-10 9:25 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-08 13:41 [PATCH 1/9] drm/i915: Update rules for reading cache lines through the LLC Chris Wilson
2013-08-08 13:41 ` [PATCH 2/9] drm/i915: Track when an object is pinned for use by the display engine Chris Wilson
2013-08-09 11:25 ` [PATCH] " Chris Wilson
2013-08-09 11:54 ` Ville Syrjälä
2013-08-08 13:41 ` [PATCH 3/9] drm/i915: Update rules for writing through the LLC with the cpu Chris Wilson
2013-08-08 15:27 ` Ville Syrjälä
2013-08-08 15:36 ` Chris Wilson
2013-08-08 15:51 ` Ville Syrjälä
2013-08-08 16:12 ` Chris Wilson
2013-08-09 11:26 ` [PATCH] " Chris Wilson
2013-08-09 11:56 ` Ville Syrjälä
2013-08-08 13:41 ` [PATCH 4/9] drm/i915: Allow the GPU to cache stolen memory Chris Wilson
2013-08-08 13:41 ` [PATCH 5/9] drm/i915: Allocate LLC ringbuffers from stolen Chris Wilson
2013-08-08 13:41 ` [PATCH 6/9] drm/i915: Allocate context objects " Chris Wilson
2013-08-10 9:25 ` Daniel Vetter [this message]
2013-08-10 9:34 ` Chris Wilson
2013-08-10 9:44 ` Daniel Vetter
2013-08-08 13:41 ` [PATCH 7/9] drm/i915: Only do a chipset flush after a clflush Chris Wilson
2013-08-08 13:41 ` [PATCH 8/9] drm/i915: Use Write-Through cacheing for the display plane on Iris Chris Wilson
2013-08-08 13:41 ` [PATCH 9/9] drm/i915: Allow the user to set bo into the DISPLAY cache domain Chris Wilson
2013-08-10 10:09 ` Daniel Vetter
2013-08-10 10:19 ` Chris Wilson
2013-08-10 12:54 ` [PATCH] drm/i915: reserve I915_CACHING_DISPLAY and document cache modes Daniel Vetter
2013-08-10 12:57 ` Daniel Vetter
2013-08-10 13:09 ` Chris Wilson
2013-08-10 15:54 ` Daniel Vetter
2013-08-12 16:53 ` [PATCH 9/9] drm/i915: Allow the user to set bo into the DISPLAY cache domain Daniel Vetter
2013-08-08 16:42 ` [PATCH 1/9] drm/i915: Update rules for reading cache lines through the LLC Ville Syrjälä
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