From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: Asynchronously perform the set-base for a simple modeset Date: Mon, 12 Aug 2013 11:03:30 +0300 Message-ID: <20130812080330.GB7159@intel.com> References: <1376057602-15233-1-git-send-email-chris@chris-wilson.co.uk> <20130809191711.GF31670@phenom.ffwll.local> <20130809200636.GA10520@cantiga.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 7AC9BE6ADE for ; Mon, 12 Aug 2013 01:03:37 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20130809200636.GA10520@cantiga.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson , Daniel Vetter , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Aug 09, 2013 at 09:06:36PM +0100, Chris Wilson wrote: > On Fri, Aug 09, 2013 at 09:17:11PM +0200, Daniel Vetter wrote: > > On Fri, Aug 09, 2013 at 03:13:22PM +0100, Chris Wilson wrote: > > > A simple modeset, where we only wish to switch over to a new framebuf= fer > > > such as the transition from fbcon to X, takes around 30-60ms. This is > > > due to three factors: > > > = > > > 1. We need to make sure the fb->obj is in the display domain, which > > > incurs a cache flush to ensure no dirt is left on the scanout. > > > = > > > 2. We need to flush any pending rendering before performing the mmio > > > so that the frame is complete before it is shown. > > > = > > > 3. We currently wait for the vblank after the mmio to be sure that the > > > old fb is no longer being shown before releasing it. > > > = > > > (1) can only be eliminated by userspace preparing the fb->obj in adva= nce > > > to already be in the display domain. This can be done through use of = the > > > create2 ioctl, or by reusing an existing fb->obj. > > > = > > > However, (2) and (3) are already solved by the existing page flip > > > mechanism, and it is surprisingly trivial to wire them up for use in = the > > > set-base fast path. Though it can be argued that this represents a > > > subtle ABI break in that the set_config ioctl now returns before the = old > > > framebuffer is unpinned. The danger is that userspace will start to > > > modify it before it is no longer being shown, however we should be ab= le > > > to prevent that through proper domain tracking. > > = > > Hm, right now we don't prevent anyone from rendering into a to-be-flipp= ed > > out buffer. There was once code in it, using MI_WAIT_EVENT but we've > > ripped it out. I guess we could just throw in a synchronous stall on the > > flip queue though, that should work always. > = > I'm glad we did. I'd rather put that into userspace rather than have the > kernel impose that policy on everybody, as for X that is exactly the > behaviour we want (i.e. not blocking rendering on the next scanout). > = > > Testing would be easy if we have the crtc CRC stuff, but that's atm stu= ck > > due to lack of volunteers ... > > = > > Overall I really like the idea and I think doing most of the plane > > enabling (including psr, fbc, ips, and all that stuff which potentially > > blows through a wblank wait) should be done in async work queues. That > > should then also help resume time a lot. > = > I'd also like to hear Ville's opinion since with his atomic modesetting > I hope we will be able to achieve something very similar. Async is nice. Like everyone else I suppose, my only concern has to do with writes to the old scanout buffer. One option would be to add an event also to setcrtc, and maybe a new flag to request the event+nonblocking operation. That's what I have in my atomic page flip code (actually I think I had separate flags for each). Unfortunately we don't seem to have flags in setcrtc, unless we commandeer some bits from mode_valid. -- = Ville Syrj=E4l=E4 Intel OTC