From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ben Widawsky <ben@bwidawsk.net>
Subject: Re: [PATCH 6.1/9] drm/i915: don't queue PM events we
 won't process
Date: Wed, 14 Aug 2013 11:36:35 -0700
Message-ID: <20130814183634.GD490@bwidawsk.net>
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To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
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On Fri, Aug 09, 2013 at 05:04:35PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> On SNB/IVB/VLV we only call gen6_rps_irq_handler if one of the IIR
> bits set is part of GEN6_PM_RPS_EVENTS, but at gen6_rps_irq_handler we
> add all the enabled IIR bits to the work queue, not only the ones that
> are part of GEN6_PM_RPS_EVENTS. But then gen6_pm_rps_work only
> processes GEN6_PM_RPS_EVENTS, so it's useless to add anything that's
> not GEN6_PM_RPS_EVENTS to the work queue.
> 
> As a bonus, gen6_rps_irq_handler looks more similar to
> hsw_pm_irq_handler, so we may be able to merge them in the future.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 0f46d33..5b51c43 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -959,7 +959,7 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv,
>  	 */
>  
>  	spin_lock(&dev_priv->irq_lock);
> -	dev_priv->rps.pm_iir |= pm_iir;
> +	dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
>  	snb_set_pm_irq(dev_priv, dev_priv->rps.pm_iir);
>  	spin_unlock(&dev_priv->irq_lock);
>  
> @@ -1128,7 +1128,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
>  		if (pipe_stats[0] & PIPE_GMBUS_INTERRUPT_STATUS)
>  			gmbus_irq_handler(dev);
>  
> -		if (pm_iir & GEN6_PM_RPS_EVENTS)
> +		if (pm_iir)
>  			gen6_rps_irq_handler(dev_priv, pm_iir);
>  
>  		I915_WRITE(GTIIR, gt_iir);
> @@ -1433,7 +1433,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>  		if (pm_iir) {
>  			if (IS_HASWELL(dev))
>  				hsw_pm_irq_handler(dev_priv, pm_iir);
> -			else if (pm_iir & GEN6_PM_RPS_EVENTS)
> +			else
>  				gen6_rps_irq_handler(dev_priv, pm_iir);
>  			I915_WRITE(GEN6_PMIIR, pm_iir);
>  			ret = IRQ_HANDLED;

Can you please add WARN_ON(pm_iir & ~GEN6_PM_RPS_EVENTS) somewhere in
the code path to make me happy?

Otherwise it's:
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

-- 
Ben Widawsky, Intel Open Source Technology Center