From: Daniel Vetter <daniel@ffwll.ch>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: drop WaMbcDriverBootEnable workaround
Date: Wed, 21 Aug 2013 23:23:04 +0200 [thread overview]
Message-ID: <20130821212303.GI26909@phenom.ffwll.local> (raw)
In-Reply-To: <1377097735-3488-1-git-send-email-jbarnes@virtuousgeek.org>
On Wed, Aug 21, 2013 at 08:08:55AM -0700, Jesse Barnes wrote:
> Turns out the BIOS will do this for us as needed, and if we try to do it
> again we risk hangs or other bad behavior.
>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Regressing commit citation missing and also cc: stable I guess?
-Daniel
> ---
> drivers/gpu/drm/i915/intel_pm.c | 17 -----------------
> 1 file changed, 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 21f4c95..c823861 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4864,10 +4864,6 @@ static void gen6_init_clock_gating(struct drm_device *dev)
> ILK_DPARBUNIT_CLOCK_GATE_ENABLE |
> ILK_DPFDUNIT_CLOCK_GATE_ENABLE);
>
> - /* WaMbcDriverBootEnable:snb */
> - I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
> - GEN6_MBCTL_ENABLE_BOOT_FETCH);
> -
> g4x_disable_trickle_feed(dev);
>
> /* The default value should be 0x200 according to docs, but the two
> @@ -4963,10 +4959,6 @@ static void haswell_init_clock_gating(struct drm_device *dev)
> I915_WRITE(CACHE_MODE_1,
> _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));
>
> - /* WaMbcDriverBootEnable:hsw */
> - I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
> - GEN6_MBCTL_ENABLE_BOOT_FETCH);
> -
> /* WaSwitchSolVfFArbitrationPriority:hsw */
> I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);
>
> @@ -5050,10 +5042,6 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
>
> g4x_disable_trickle_feed(dev);
>
> - /* WaMbcDriverBootEnable:ivb */
> - I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
> - GEN6_MBCTL_ENABLE_BOOT_FETCH);
> -
> /* WaVSRefCountFullforceMissDisable:ivb */
> gen7_setup_fixed_func_scheduler(dev_priv);
>
> @@ -5113,11 +5101,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
> I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
> GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
>
> - /* WaMbcDriverBootEnable:vlv */
> - I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
> - GEN6_MBCTL_ENABLE_BOOT_FETCH);
> -
> -
> /* According to the BSpec vol1g, bit 12 (RCPBUNIT) clock
> * gating disable must be set. Failure to set it results in
> * flickering pixels due to Z write ordering failures after
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2013-08-21 21:22 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-21 15:08 [PATCH] drm/i915: drop WaMbcDriverBootEnable workaround Jesse Barnes
2013-08-21 21:23 ` Daniel Vetter [this message]
2013-08-21 21:39 ` Jesse Barnes
2013-08-21 22:09 ` Daniel Vetter
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