public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ben Widawsky <benjamin.widawsky@intel.com>
Cc: Intel GFX <intel-gfx@lists.freedesktop.org>,
	Ben Widawsky <ben@bwidawsk.net>
Subject: Re: [PATCH 1/2] drm/i915: Update plane flip count registers
Date: Thu, 22 Aug 2013 20:18:44 +0300	[thread overview]
Message-ID: <20130822171844.GB29682@intel.com> (raw)
In-Reply-To: <1377141353-11532-1-git-send-email-benjamin.widawsky@intel.com>

On Wed, Aug 21, 2013 at 08:15:52PM -0700, Ben Widawsky wrote:
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 53d0e70..d1079db 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3277,7 +3277,6 @@
>  #define   PIPE_PIXEL_SHIFT        0
>  /* GM45+ just has to be different */
>  #define _PIPEA_FRMCOUNT_GM45	0x70040
> -#define _PIPEA_FLIPCOUNT_GM45	0x70044
>  #define PIPE_FRMCOUNT_GM45(pipe) _PIPE(pipe, _PIPEA_FRMCOUNT_GM45, _PIPEB_FRMCOUNT_GM45)
>  
>  /* Cursor A & B regs */
> @@ -3361,6 +3360,7 @@
>  #define   DISPPLANE_STEREO_POLARITY_SECOND	(1<<18)
>  #define   DISPPLANE_TRICKLE_FEED_DISABLE	(1<<14) /* Ironlake */
>  #define   DISPPLANE_TILED			(1<<10)
> +#define _DSPAFLIPCNT		(dev_priv->info->display_mmio_offset + 0x70044)

Hmm. I don't quite get it. Why rename and move it? Sure it should really
be called DSPFLIPCNT since it applies to the primary plane, but BSpec
doesn't actually call it that, never has AFAICS.

Also I was first sceptical about the mmio_offset, since I remembered
seeing the pre-CTG two part frame counter registers in VLV specs. But after
re-checking, the TOC only has the old regs, while the actual text has only
the CTG style regs. So I guess VLV does indeed have the CTG style registers.
I don't have a VLV board on me to verify though.

>  #define _DSPAADDR		(dev_priv->info->display_mmio_offset + 0x70184)
>  #define _DSPASTRIDE		(dev_priv->info->display_mmio_offset + 0x70188)
>  #define _DSPAPOS		(dev_priv->info->display_mmio_offset + 0x7018C) /* reserved */
> @@ -3380,6 +3380,7 @@
>  #define DSPLINOFF(plane) DSPADDR(plane)
>  #define DSPOFFSET(plane) _PIPE(plane, _DSPAOFFSET, _DSPBOFFSET)
>  #define DSPSURFLIVE(plane) _PIPE(plane, _DSPASURFLIVE, _DSPBSURFLIVE)
> +#define DSPFLIPCNT(plane) _PIPE(plane, _DSPAFLIPCNT, _DSPBFLIPCNT)
>  
>  /* Display/Sprite base address macros */
>  #define DISP_BASEADDR_MASK	(0xfffff000)
> @@ -3410,10 +3411,11 @@
>  #define _PIPEBFRAMEHIGH		(dev_priv->info->display_mmio_offset + 0x71040)
>  #define _PIPEBFRAMEPIXEL	(dev_priv->info->display_mmio_offset + 0x71044)
>  #define _PIPEB_FRMCOUNT_GM45	0x71040
> -#define _PIPEB_FLIPCOUNT_GM45	0x71044
> +#define _PIPEB_FLIPCOUNT	(dev_priv->info->display_mmio_offset + 0x71044
>  
>  
>  /* Display B control */
> +#define _DSPBFLIPCNT		(dev_priv->info->display_mmio_offset + 0x71044)
>  #define _DSPBCNTR		(dev_priv->info->display_mmio_offset + 0x71180)
>  #define   DISPPLANE_ALPHA_TRANS_ENABLE		(1<<15)
>  #define   DISPPLANE_ALPHA_TRANS_DISABLE		0
> -- 
> 1.8.3.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC

  parent reply	other threads:[~2013-08-22 17:18 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-22  3:15 [PATCH 1/2] drm/i915: Update plane flip count registers Ben Widawsky
2013-08-22  3:15 ` [PATCH 2/2] drm/i915: Add debugfs interface for planes Ben Widawsky
2013-08-22  2:16   ` Ben Widawsky
2013-08-22  2:21     ` Chris Wilson
2013-08-22  2:27       ` Ben Widawsky
2013-08-22  2:32         ` Chris Wilson
2013-08-22  3:23   ` [PATCH 2/2] [v2] " Ben Widawsky
2013-08-22 17:18 ` Ville Syrjälä [this message]
2013-08-22 18:12   ` [PATCH 1/2] drm/i915: Update plane flip count registers Ben Widawsky
2013-08-22 18:25     ` Ville Syrjälä

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20130822171844.GB29682@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=ben@bwidawsk.net \
    --cc=benjamin.widawsky@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox