From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 09/17] drm/i915: Report requested frequency alongside current frequency in debugfs Date: Wed, 28 Aug 2013 10:15:25 +0200 Message-ID: <20130828081525.GA5606@phenom.ffwll.local> References: <1377557469-4078-1-git-send-email-rodrigo.vivi@gmail.com> <1377557469-4078-10-git-send-email-rodrigo.vivi@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f47.google.com (mail-ee0-f47.google.com [74.125.83.47]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D8D0E762F for ; Wed, 28 Aug 2013 01:15:28 -0700 (PDT) Received: by mail-ee0-f47.google.com with SMTP id d49so2737012eek.6 for ; Wed, 28 Aug 2013 01:15:27 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Rodrigo Vivi Cc: intel-gfx List-Id: intel-gfx@lists.freedesktop.org On Tue, Aug 27, 2013 at 09:12:40AM -0300, Rodrigo Vivi wrote: > On Mon, Aug 26, 2013 at 7:51 PM, Rodrigo Vivi wrote: > > From: Chris Wilson > > > > It can be useful to compare at times the current vs requested frequency > > of the GPU, so provide the contents of RPNSWREQ alonside CAGF. > > > > Signed-off-by: Chris Wilson > > --- > > drivers/gpu/drm/i915/i915_debugfs.c | 11 ++++++++++- > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > > index 55ab924..a6f4cb5 100644 > > --- a/drivers/gpu/drm/i915/i915_debugfs.c > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > > @@ -857,7 +857,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) > > u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS); > > u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS); > > u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); > > - u32 rpstat, cagf; > > + u32 rpstat, cagf, reqf; > > u32 rpupei, rpcurup, rpprevup; > > u32 rpdownei, rpcurdown, rpprevdown; > > int max_freq; > > @@ -869,6 +869,14 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) > > > > gen6_gt_force_wake_get(dev_priv); > > > > + reqf = I915_READ(GEN6_RPNSWREQ); > > + reqf &= ~GEN6_TURBO_DISABLE; > > + if (IS_HASWELL(dev)) > > + reqf >>= 24; > > + else > > + reqf >>= 25; > > I would prefer a define like HSW_REQF_SHIFT 24 close to HSW_FREQUENCY > to avoid people asking why magic 24/25 value. > I added the HSW_FREQUENCY there and still asked "why 24?" > > But with or without this bikeshed: > Reviewed-by: Rodrigo Vivi Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch