public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Ben Widawsky <ben@bwidawsk.net>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 08/17] drm/i915: Always prefer CPU relocations with LLC
Date: Thu, 29 Aug 2013 12:16:40 -0700	[thread overview]
Message-ID: <20130829191640.GA2415@bwidawsk.net> (raw)
In-Reply-To: <20130829191116.GF5606@phenom.ffwll.local>

On Thu, Aug 29, 2013 at 09:11:16PM +0200, Daniel Vetter wrote:
> On Thu, Aug 29, 2013 at 10:20:06AM -0700, Ben Widawsky wrote:
> > On Mon, Aug 26, 2013 at 07:51:00PM -0300, Rodrigo Vivi wrote:
> > > From: Chris Wilson <chris@chris-wilson.co.uk>
> > > 
> > > A follow-on to the update of the LLC coherency logic is that we can rely
> > > on the LLC being coherent with the CS for rewriting batchbuffers
> > > irrespective of their cache domain. (This should have no effect
> > > currently as all the batch buffers are expected to be I915_CACHE_LLC and
> > > so using the cpu relocation path anyway.)
> > > 
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > ---
> > >  drivers/gpu/drm/i915/i915_gem_execbuffer.c | 5 +++--
> > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > > index 792c52a..3b64b9f 100644
> > > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > > @@ -166,7 +166,8 @@ eb_destroy(struct eb_objects *eb)
> > >  
> > >  static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
> > >  {
> > > -	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
> > > +	return (HAS_LLC(obj->base.dev) ||
> > > +		obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
> > >  		!obj->map_and_fenceable ||
> > >  		obj->cache_level != I915_CACHE_NONE);
> > 
> > Assuming the commit message is factually correct... the obj->cache_level
> > shouldn't factor into the equation at all.
> 
> We stil need to take the cache level into account on non-llc machines ...
> -Daniel

I always forget I915_CACHE_LLC is overloaded to mean snoopable.

-- 
Ben Widawsky, Intel Open Source Technology Center

  reply	other threads:[~2013-08-29 19:16 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-26 22:50 [PATCH 00/17] drm-intel-collector WW34 - Simple patches as series for review Rodrigo Vivi
2013-08-26 22:50 ` [PATCH 01/17] drm/i915: Do not add an interrupt for a context switch Rodrigo Vivi
2013-08-30 14:17   ` Damien Lespiau
2013-08-26 22:50 ` [PATCH 02/17] drm/i915: Rearrange the comments in i915_add_request() Rodrigo Vivi
2013-08-30 14:21   ` Damien Lespiau
2013-08-26 22:50 ` [PATCH 03/17] drm/i915: Pin pages whilst mapping the dma-buf Rodrigo Vivi
2013-08-30 14:27   ` Damien Lespiau
2013-09-02  6:04     ` Daniel Vetter
2013-08-26 22:50 ` [PATCH 04/17] drm/i915: check that the i965g/gm 4G limit is really obeyed Rodrigo Vivi
2013-08-26 22:50 ` [PATCH 05/17] drm/i915: Cancel outstanding modeset workers before suspend Rodrigo Vivi
2013-08-26 22:50 ` [PATCH 06/17] drm/i915: split PCI IDs out into i915_drm.h v4 Rodrigo Vivi
2013-08-29 17:27   ` Ben Widawsky
2013-08-26 22:50 ` [PATCH 07/17] x86: add early quirk for reserving Intel graphics stolen memory v5 Rodrigo Vivi
2013-08-26 22:51 ` [PATCH 08/17] drm/i915: Always prefer CPU relocations with LLC Rodrigo Vivi
2013-08-27 14:49   ` Ville Syrjälä
2013-08-27 15:25     ` Daniel Vetter
2013-08-29 17:20   ` Ben Widawsky
2013-08-29 19:11     ` Daniel Vetter
2013-08-29 19:16       ` Ben Widawsky [this message]
2013-08-26 22:51 ` [PATCH 09/17] drm/i915: Report requested frequency alongside current frequency in debugfs Rodrigo Vivi
2013-08-27 12:12   ` Rodrigo Vivi
2013-08-27 12:36     ` Chris Wilson
2013-08-28  8:15     ` Daniel Vetter
2013-08-26 22:51 ` [PATCH 10/17] drm/i915: Move the conditional seqno query into the tracepoint Rodrigo Vivi
2013-08-26 22:51 ` [PATCH 11/17] drm/i915: Add some missing steps to i915_driver_load error path Rodrigo Vivi
2013-08-26 22:51 ` [PATCH 12/17] drm/i915: Asynchronously perform the set-base for a simple modeset Rodrigo Vivi
2013-08-26 22:51 ` [PATCH 13/17] drm/i915: Align tiled scanouts from stolen memory to 256k in the GTT Rodrigo Vivi
2013-08-26 22:51 ` [PATCH 14/17] drm/i915: Apply the force-detect VGA w/a to Valleyview Rodrigo Vivi
2013-08-27  9:27   ` Daniel Vetter
2013-08-26 22:51 ` [PATCH 15/17] drm/i915: Pair seqno completion tracepoint with its dispatch Rodrigo Vivi
2013-08-26 22:51 ` [PATCH 16/17] RFM drm/i915: Boost RPS frequency for CPU stalls Rodrigo Vivi
2013-08-26 22:56   ` Chris Wilson
2013-08-26 22:51 ` [PATCH 17/17] drm/i915: Enable Lower Slice on Haswell GT3 Rodrigo Vivi
2013-08-27 15:31   ` Rodrigo Vivi
2013-08-27 17:05     ` Rodrigo Vivi
2013-08-27  9:39 ` [PATCH 00/17] drm-intel-collector WW34 - Simple patches as series for review Daniel Vetter
2013-08-27 10:23   ` Chris Wilson
2013-08-27 12:48   ` Rodrigo Vivi
2013-08-27 16:19   ` Chris Wilson
2013-08-27 17:04     ` Rodrigo Vivi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20130829191640.GA2415@bwidawsk.net \
    --to=ben@bwidawsk.net \
    --cc=daniel@ffwll.ch \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox