public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 02/19] drm/i915: Call intel_update_watermarks() in specific place during modeset
Date: Fri, 30 Aug 2013 23:49:52 +0300	[thread overview]
Message-ID: <20130830204952.GQ11428@intel.com> (raw)
In-Reply-To: <CA+gsUGRLr2SqLHev9OjK9HmGRXHv6nvyH-1hb8YPFCFmg8Kswg@mail.gmail.com>

On Fri, Aug 30, 2013 at 05:26:29PM -0300, Paulo Zanoni wrote:
> 2013/8/30  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Make the call to intel_update_watermarks() just once or twice during
> > modeset. Ideally it should happen independently when each plane gets
> > enabled/disabled, but for now it seems better to keep it in central
> > place. We can improve things when we get all the planes sorted out
> > in a better way.
> >
> > When enabling set up the watermarks just before the pipe is enabled.
> > And when disabling we need to wait until we've marked the crtc as
> > inactive.
> 
> Why do we need to wait until we've marked the CRTC as inactive?
> (Daniel/Ville should put the answer in the commit message)

Because the watermark compute code looks at intel_crtc->active. If we
compute the watermarks before, the code thinks the pipe is active.

Hmm. BTW now that I look at intel_crtc_active() I start to wonder why it
looks at the clock in the user specified mode. In fact most (maybe all?)
of the pre-hsw watermark code is fscked up and it looks at the wrong
mode. Sigh. Suppose I need to make a quick for all that as well...

-- 
Ville Syrjälä
Intel OTC

  reply	other threads:[~2013-08-30 20:49 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-30 11:30 [PATCH 00/19] drm/i915: More HSW watermark prep work ville.syrjala
2013-08-30 11:30 ` [PATCH 01/19] drm/i915: Pass crtc to intel_update_watermarks() ville.syrjala
2013-08-30 20:09   ` Paulo Zanoni
2013-08-30 20:29     ` Ville Syrjälä
2013-09-10  8:40     ` [PATCH v2] " ville.syrjala
2013-08-30 11:30 ` [PATCH 02/19] drm/i915: Call intel_update_watermarks() in specific place during modeset ville.syrjala
2013-08-30 20:26   ` Paulo Zanoni
2013-08-30 20:49     ` Ville Syrjälä [this message]
2013-09-02  6:17       ` Daniel Vetter
2013-09-10  8:39     ` [PATCH v2] " ville.syrjala
2013-08-30 11:30 ` [PATCH 03/19] drm/i915: Constify some watermark data ville.syrjala
2013-08-30 20:36   ` Paulo Zanoni
2013-08-30 11:30 ` [PATCH 04/19] drm/i915: Use ilk_compute_wm_level to compute WM_PIPE values ville.syrjala
2013-08-30 21:39   ` Paulo Zanoni
2013-08-30 11:30 ` [PATCH 05/19] drm/i915: Refactor max WM level ville.syrjala
2013-08-30 21:40   ` Paulo Zanoni
2013-09-10  9:17     ` Daniel Vetter
2013-08-30 11:30 ` [PATCH 06/19] drm/i915: Add intel_pipe_wm and prepare for watermark pre-compute ville.syrjala
2013-09-16 15:07   ` Paulo Zanoni
2013-09-16 16:29     ` Ville Syrjälä
2013-09-16 20:36       ` Daniel Vetter
2013-08-30 11:30 ` [PATCH 07/19] drm/i915: Don't re-compute pipe watermarks except for the affected pipe ville.syrjala
2013-08-30 11:30 ` [PATCH 08/19] drm/i915: Move LP1+ watermark merging out from hsw_compute_wm_results() ville.syrjala
2013-08-30 11:30 ` [PATCH 09/19] drm/i915: Use intel_pipe_wm in hsw_find_best_results ville.syrjala
2013-08-30 11:30 ` [PATCH 10/19] drm/i915: Move some computations out from hsw_compute_wm_parameters() ville.syrjala
2013-08-30 11:30 ` [PATCH 11/19] drm/i915: Don't compute 5/6 DDB split w/ zero active pipes ville.syrjala
2013-08-30 11:30 ` [PATCH 12/19] drm/i915: Refactor wm_lp to level calculation ville.syrjala
2013-08-30 11:30 ` [PATCH 13/19] drm/i915: Kill fbc_wm_enabled from intel_wm_config ville.syrjala
2013-08-30 11:30 ` [PATCH 14/19] drm/i915: Store current watermark state in dev_priv->wm ville.syrjala
2013-08-30 11:30 ` [PATCH 15/19] drm/i915: Improve watermark dirtyness checks ville.syrjala
2013-08-30 11:30 ` [PATCH 16/19] drm/i915: Init HSW watermark tracking in intel_modeset_setup_hw_state() ville.syrjala
2013-08-30 11:30 ` [PATCH 17/19] drm/i915: Remove a somewhat silly debug print from watermark code ville.syrjala
2013-08-30 11:30 ` [PATCH 18/19] drm/i915: Adjust watermark register masks ville.syrjala
2013-08-30 11:30 ` [PATCH 19/19] drm/i915: Add watermark tracepoints ville.syrjala

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20130830204952.GQ11428@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=przanoni@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox