public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Daniel Vetter <daniel@ffwll.ch>
To: Ben Widawsky <benjamin.widawsky@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Ben Widawsky <ben@bwidawsk.net>
Subject: Re: [PATCH 5/7] intel_gtt: Properly support gen6+ GTT PTEs
Date: Mon, 2 Sep 2013 09:14:24 +0200	[thread overview]
Message-ID: <20130902071424.GQ9374@phenom.ffwll.local> (raw)
In-Reply-To: <1378065086-28705-5-git-send-email-benjamin.widawsky@intel.com>

On Sun, Sep 01, 2013 at 12:51:24PM -0700, Ben Widawsky wrote:
> This finishes the objective in the last patch which was to actually deal
> with physical addresses, and not the PTEs.
> 
> GEN6+ Provided support for physical addresses above 4GB. I'm not
> actually sure what Ironlake supported, and don't feel like firing up the
> timemachine.
> 
> Haswell caveat is coming up next.
> 
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

gen4/5 and pnv/g33 simply have

+	pae = (phys & 0xf0) << 28;
+
+	return (phys | pae) & ~0xfff;

Cheers, Daniel


> ---
>  tools/intel_gtt.c | 26 ++++++++++++++++++--------
>  1 file changed, 18 insertions(+), 8 deletions(-)
> 
> diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c
> index 32a6618..874a4f6 100644
> --- a/tools/intel_gtt.c
> +++ b/tools/intel_gtt.c
> @@ -25,6 +25,8 @@
>   *
>   */
>  
> +#define __STDC_FORMAT_MACROS
> +#include <inttypes.h>
>  #include <stdio.h>
>  #include <stdlib.h>
>  #include <string.h>
> @@ -37,18 +39,26 @@
>  #define KB(x) ((x) * 1024)
>  #define MB(x) ((x) * 1024 * 1024)
>  unsigned char *gtt;
> +uint32_t devid;
>  
>  #define INGTT(offset) (*(volatile uint32_t *)(gtt + (offset) / (KB(4) / 4)))
>  static uint64_t get_phys(uint32_t pt_offset)
>  {
> -	return INGTT(pt_offset);
> +	uint64_t pae = 0;
> +	uint64_t phys = INGTT(pt_offset);
> +
> +	if (intel_gen(devid) < 6)
> +		return phys;
> +
> +	pae = (phys & 0xff0) << 28;
> +
> +	return (phys | pae) & ~0xfff;
>  }
>  
>  int main(int argc, char **argv)
>  {
>  	struct pci_device *pci_dev;
>  	int start, aper_size;
> -	uint32_t devid;
>  	int flag[] = {
>  		PCI_DEV_MAP_FLAG_WRITE_COMBINE,
>  		PCI_DEV_MAP_FLAG_WRITABLE,
> @@ -94,14 +104,14 @@ int main(int argc, char **argv)
>  	aper_size = pci_dev->regions[2].size;
>  
>  	for (start = 0; start < aper_size; start += KB(4)) {
> -		uint32_t start_phys = INGTT(start);
> +		uint64_t start_phys = get_phys(start);
>  		uint32_t end;
>  		int constant_length = 0;
>  		int linear_length = 0;
>  
>  		/* Check if it's a linear sequence */
>  		for (end = start + KB(4); end < aper_size; end += KB(4)) {
> -			uint32_t end_phys = INGTT(end);
> +			uint64_t end_phys = get_phys(end);
>  			if (end_phys == start_phys + (end - start))
>  				linear_length++;
>  			else
> @@ -109,7 +119,7 @@ int main(int argc, char **argv)
>  		}
>  		if (linear_length > 0) {
>  			printf("0x%08x - 0x%08x: linear from "
> -			       "0x%08x to 0x%08x\n",
> +			       "0x%" PRIx64 " to 0x%" PRIx64 "\n",
>  			       start, end - KB(4),
>  			       start_phys, start_phys + (end - start) - KB(4));
>  			start = end - KB(4);
> @@ -118,20 +128,20 @@ int main(int argc, char **argv)
>  
>  		/* Check if it's a constant sequence */
>  		for (end = start + KB(4); end < aper_size; end += KB(4)) {
> -			uint32_t end_phys = INGTT(end);
> +			uint64_t end_phys = get_phys(end);
>  			if (end_phys == start_phys)
>  				constant_length++;
>  			else
>  				break;
>  		}
>  		if (constant_length > 0) {
> -			printf("0x%08x - 0x%08x: constant 0x%08x\n",
> +			printf("0x%08x - 0x%08x: constant 0x%" PRIx64 "\n",
>  			       start, end - KB(4), start_phys);
>  			start = end - KB(4);
>  			continue;
>  		}
>  
> -		printf("0x%08x: 0x%08x\n", start, start_phys);
> +		printf("0x%08x: 0x%" PRIx64 "\n", start, start_phys);
>  	}
>  
>  	return 0;
> -- 
> 1.8.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2013-09-02  7:14 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-01 19:51 [PATCH 1/7] intel_reg_dumper: Silence GCC for uninitialized clock Ben Widawsky
2013-09-01 19:51 ` [PATCH 2/7] gem_vmap_blits: Demote warning to note Ben Widawsky
2013-09-01 19:51 ` [PATCH 3/7] tools/Makefile.am: use -Werror Ben Widawsky
2013-09-01 19:51 ` [PATCH 4/7] intel_gtt: Use function to get the physical address Ben Widawsky
2013-09-01 19:51 ` [PATCH 5/7] intel_gtt: Properly support gen6+ GTT PTEs Ben Widawsky
2013-09-02  7:14   ` Daniel Vetter [this message]
2013-09-01 19:51 ` [PATCH 6/7] intel_gtt: Support HSW PTEs Ben Widawsky
2013-09-01 19:51 ` [PATCH 7/7] intel_gtt: Raw PTE dumper mode Ben Widawsky

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20130902071424.GQ9374@phenom.ffwll.local \
    --to=daniel@ffwll.ch \
    --cc=ben@bwidawsk.net \
    --cc=benjamin.widawsky@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox