From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 08/12] drm/i915: Make intel_crtc_active() available outside intel_pm.c Date: Mon, 2 Sep 2013 20:42:37 +0200 Message-ID: <20130902184237.GC9374@phenom.ffwll.local> References: <1378145619-22655-1-git-send-email-ville.syrjala@linux.intel.com> <1378145619-22655-9-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ee0-f44.google.com (mail-ee0-f44.google.com [74.125.83.44]) by gabe.freedesktop.org (Postfix) with ESMTP id F33F4E5F61 for ; Mon, 2 Sep 2013 11:42:22 -0700 (PDT) Received: by mail-ee0-f44.google.com with SMTP id b47so2527856eek.17 for ; Mon, 02 Sep 2013 11:42:22 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1378145619-22655-9-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Sep 02, 2013 at 09:13:35PM +0300, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > Move intel_crtc_active() to intel_display.c and make it available > elsewhere as well. > = > intel_edp_psr_match_conditions() already has one open coded copy, > so replace that one with a call to intel_crtc_active(). > = > Signed-off-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++ > drivers/gpu/drm/i915/intel_dp.c | 3 +-- > drivers/gpu/drm/i915/intel_drv.h | 1 + > drivers/gpu/drm/i915/intel_pm.c | 11 ----------- > 4 files changed, 13 insertions(+), 13 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index 19b203c..f49dbe8 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -751,6 +751,17 @@ vlv_find_best_dpll(const intel_limit_t *limit, struc= t drm_crtc *crtc, > return true; > } > = > +bool intel_crtc_active(struct drm_crtc *crtc) > +{ > + struct intel_crtc *intel_crtc =3D to_intel_crtc(crtc); > + > + /* Be paranoid as we can arrive here with only partial > + * state retrieved from the hardware during setup. > + */ > + return intel_crtc->active && crtc->fb && > + intel_crtc->config.adjusted_mode.clock; If you touch this can you please add a big comment explaining that we can ditch the adjusted_mode.clock check as soon as Haswell has gained clock readout/fastboot support and that we can ditch the crtc->fb check as soon as we can properly reconstruct framebuffers? Thanks, Daniel > +} > + > enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *de= v_priv, > enum pipe pipe) > { > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel= _dp.c > index e2cb650..5ce5968 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1555,8 +1555,7 @@ static bool intel_edp_psr_match_conditions(struct i= ntel_dp *intel_dp) > } > = > intel_crtc =3D to_intel_crtc(crtc); > - if (!intel_crtc->active || !crtc->fb || > - !intel_crtc->config.adjusted_mode.clock) { > + if (!intel_crtc_active(crtc)) { > DRM_DEBUG_KMS("crtc not active for PSR\n"); > dev_priv->no_psr_reason =3D PSR_CRTC_NOT_ACTIVE; > return false; > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/inte= l_drv.h > index 5efb844..e017c30 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -798,5 +798,6 @@ extern void hsw_pc8_disable_interrupts(struct drm_dev= ice *dev); > extern void hsw_pc8_restore_interrupts(struct drm_device *dev); > extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_p= riv); > extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_p= riv); > +extern bool intel_crtc_active(struct drm_crtc *crtc); > = > #endif /* __INTEL_DRV_H__ */ > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel= _pm.c > index 397628b..3ba412c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -43,17 +43,6 @@ > * i915.i915_enable_fbc parameter > */ > = > -static bool intel_crtc_active(struct drm_crtc *crtc) > -{ > - struct intel_crtc *intel_crtc =3D to_intel_crtc(crtc); > - > - /* Be paranoid as we can arrive here with only partial > - * state retrieved from the hardware during setup. > - */ > - return intel_crtc->active && crtc->fb && > - intel_crtc->config.adjusted_mode.clock; > -} > - > static void i8xx_disable_fbc(struct drm_device *dev) > { > struct drm_i915_private *dev_priv =3D dev->dev_private; > -- = > 1.8.1.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch