From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v2 1/4] drm/i915: name intel dp hooks per platform Date: Thu, 5 Sep 2013 17:56:55 +0300 Message-ID: <20130905145654.GE11428@intel.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id D0D4DE5CEA for ; Thu, 5 Sep 2013 07:56:58 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Sep 05, 2013 at 04:44:44PM +0300, Jani Nikula wrote: > In line with the rest of the code base. No functional changes. > = > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_dp.c | 14 ++++++++------ > 1 file changed, 8 insertions(+), 6 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel= _dp.c > index d6eba38..2abe12f 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1720,6 +1720,11 @@ static void intel_enable_dp(struct intel_encoder *= encoder) > ironlake_edp_backlight_on(intel_dp); > } > = > +static void g4x_enable_dp(struct intel_encoder *encoder) > +{ > + intel_enable_dp(encoder); > +} > + > static void vlv_enable_dp(struct intel_encoder *encoder) > { > } > @@ -1764,7 +1769,7 @@ static void vlv_pre_enable_dp(struct intel_encoder = *encoder) > vlv_wait_port_ready(dev_priv, port); > } > = > -static void intel_dp_pre_pll_enable(struct intel_encoder *encoder) > +static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder) > { > struct intel_digital_port *dport =3D enc_to_dig_port(&encoder->base); > struct drm_device *dev =3D encoder->base.dev; > @@ -1774,9 +1779,6 @@ static void intel_dp_pre_pll_enable(struct intel_en= coder *encoder) > int port =3D vlv_dport_to_channel(dport); > int pipe =3D intel_crtc->pipe; > = > - if (!IS_VALLEYVIEW(dev)) > - return; > - > /* Program Tx lane resets to default */ > mutex_lock(&dev_priv->dpio_lock); > vlv_dpio_write(dev_priv, pipe, DPIO_PCS_TX(port), > @@ -3549,12 +3551,12 @@ intel_dp_init(struct drm_device *dev, int output_= reg, enum port port) > intel_encoder->get_hw_state =3D intel_dp_get_hw_state; > intel_encoder->get_config =3D intel_dp_get_config; > if (IS_VALLEYVIEW(dev)) { > - intel_encoder->pre_pll_enable =3D intel_dp_pre_pll_enable; > + intel_encoder->pre_pll_enable =3D vlv_dp_pre_pll_enable; > intel_encoder->pre_enable =3D vlv_pre_enable_dp; > intel_encoder->enable =3D vlv_enable_dp; > } else { > intel_encoder->pre_enable =3D intel_pre_enable_dp; ^^^^^ Should get renamed to g4x too for consistency. > - intel_encoder->enable =3D intel_enable_dp; > + intel_encoder->enable =3D g4x_enable_dp; > } > = > intel_dig_port->port =3D port; > -- = > 1.7.9.5 -- = Ville Syrj=E4l=E4 Intel OTC