From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [Intel-gfx] [PATCH] drm/i915/sdvo: Fully translate sync flags in the dtd->mode conversion Date: Tue, 10 Sep 2013 12:42:24 +0300 Message-ID: <20130910094224.GK11428@intel.com> References: <522A5008.6060005@t-online.de> <1378800168-32277-1-git-send-email-daniel.vetter@ffwll.ch> <20130910093824.GJ11428@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Content-Disposition: inline In-Reply-To: <20130910093824.GJ11428@intel.com> Sender: linux-kernel-owner@vger.kernel.org To: Daniel Vetter Cc: Intel Graphics Development , LKML List-Id: intel-gfx@lists.freedesktop.org On Tue, Sep 10, 2013 at 12:38:24PM +0300, Ville Syrj=E4l=E4 wrote: > On Tue, Sep 10, 2013 at 10:02:48AM +0200, Daniel Vetter wrote: > > Instead of just a flag bit for each of the positive/negative sync > > modes drm actually uses a separate flag for each ... This upsets th= e > > modeset checker since the adjusted mode filled out at modeset time > > doesn't match the one reconstructed at check time (since the > > ->get_config callback already gets this right). > >=20 > > Reported-by: Knut Petersen > > Cc: Knut Petersen > > References: http://www.gossamer-threads.com/lists/linux/kernel/1778= 688?do=3Dpost_view_threaded > > Signed-off-by: Daniel Vetter > > --- > > drivers/gpu/drm/i915/intel_sdvo.c | 4 ++++ > > 1 file changed, 4 insertions(+) > >=20 > > diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i9= 15/intel_sdvo.c > > index 85037b9..5033c74 100644 > > --- a/drivers/gpu/drm/i915/intel_sdvo.c > > +++ b/drivers/gpu/drm/i915/intel_sdvo.c > > @@ -866,8 +866,12 @@ static void intel_sdvo_get_mode_from_dtd(struc= t drm_display_mode * mode, > > mode->flags |=3D DRM_MODE_FLAG_INTERLACE; > > if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) > > mode->flags |=3D DRM_MODE_FLAG_PHSYNC; > > + else > > + mode->flags |=3D DRM_MODE_FLAG_NHSYNC; > > if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) > > mode->flags |=3D DRM_MODE_FLAG_PVSYNC; > > + else > > + mode->flags |=3D DRM_MODE_FLAG_NVSYNC; >=20 > Actually it seems we don't recreate the mode from scratch here, so we > should also clear the negative sync flags (and the interlace flag too= )=20 > before we set them. =2E.. and we seem to be missing a drm_mode_set_crtcinfo() call too. >=20 > > } > > =20 > > static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_= sdvo) > > --=20 > > 1.8.4.rc3 > >=20 > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx >=20 > --=20 > Ville Syrj=E4l=E4 > Intel OTC --=20 Ville Syrj=E4l=E4 Intel OTC