From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 1/5] drm/i915: don't save/restore LBB on Gen5+ Date: Thu, 12 Sep 2013 20:36:18 +0300 Message-ID: <20130912173618.GD20128@intel.com> References: <1379005101-1500-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 8E043E6620 for ; Thu, 12 Sep 2013 10:36:47 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1379005101-1500-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Thu, Sep 12, 2013 at 01:58:17PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > = > Because this PCI config register doesn't exist on Gen5+. > = > Signed-off-by: Paulo Zanoni Yep. Can't see it in configdb. Actually it's only listed there for CTG and CLN, which I guess makes sense as non-mobile platforms probably don't have backlights. For BLB and ELK it's listed as reserved and RO, so I guess it doesn't hurt to poke it on them. If I'm wrong we could probably slap on an IS_MOBILE() check there too. Older stuff doesn't exist in configdb, so that's as far back as I can go. Reviewed-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/i915_suspend.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i= 915_suspend.c > index 70db618..3538370 100644 > --- a/drivers/gpu/drm/i915/i915_suspend.c > +++ b/drivers/gpu/drm/i915/i915_suspend.c > @@ -340,7 +340,9 @@ int i915_save_state(struct drm_device *dev) > struct drm_i915_private *dev_priv =3D dev->dev_private; > int i; > = > - pci_read_config_byte(dev->pdev, LBB, &dev_priv->regfile.saveLBB); > + if (INTEL_INFO(dev)->gen <=3D 4) > + pci_read_config_byte(dev->pdev, LBB, > + &dev_priv->regfile.saveLBB); > = > mutex_lock(&dev->struct_mutex); > = > @@ -390,7 +392,9 @@ int i915_restore_state(struct drm_device *dev) > struct drm_i915_private *dev_priv =3D dev->dev_private; > int i; > = > - pci_write_config_byte(dev->pdev, LBB, dev_priv->regfile.saveLBB); > + if (INTEL_INFO(dev)->gen <=3D 4) > + pci_write_config_byte(dev->pdev, LBB, > + dev_priv->regfile.saveLBB); > = > mutex_lock(&dev->struct_mutex); > = > -- = > 1.8.3.1 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC