From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 4/8] drm/i915: Fix HSW parity test Date: Fri, 13 Sep 2013 11:17:37 +0300 Message-ID: <20130913081737.GK20128@intel.com> References: <1379050122-12774-1-git-send-email-benjamin.widawsky@intel.com> <1379050122-12774-5-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 44524E6155 for ; Fri, 13 Sep 2013 01:17:42 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1379050122-12774-5-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ben Widawsky Cc: intel-gfx@lists.freedesktop.org, vishnu.venkatesh@intel.com, bryan.j.bell@intel.com, Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org On Thu, Sep 12, 2013 at 10:28:30PM -0700, Ben Widawsky wrote: > Haswell changed the log registers to be WO, so we can no longer read > them to determine the programming (which sucks, see later note). For > now, simply use the cached value, and hope HW doesn't screw us over. > = > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=3D57441 > Signed-off-by: Ben Widawsky > --- > drivers/gpu/drm/i915/i915_sysfs.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > = > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i91= 5_sysfs.c > index d572435..43c2e81 100644 > --- a/drivers/gpu/drm/i915/i915_sysfs.c > +++ b/drivers/gpu/drm/i915/i915_sysfs.c > @@ -133,6 +133,19 @@ i915_l3_read(struct file *filp, struct kobject *kobj, > if (ret) > return ret; > = > + if (IS_HASWELL(drm_dev)) { > + int last =3D min_t(int, GEN7_L3LOG_SIZE, count + offset); > + if ((!dev_priv->l3_parity.remap_info)) ^^ Also could just flip the if vs. else branches around to avoid the '!'. > + memset(buf + offset, 0, last - offset); > + else > + memcpy(buf + offset, > + dev_priv->l3_parity.remap_info + (offset/4), > + last - offset); > + > + i =3D last; And it looks like this didn't get updated after we bikesh(r)edded the register read part. It should just be: if (...) memset(buf, 0, count); else memcpy(buf, dev_priv->l3_parity.remap_info + (offset/4), count); > + goto out; > + } > + > misccpctl =3D I915_READ(GEN7_MISCCPCTL); > I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); > = > @@ -141,6 +154,7 @@ i915_l3_read(struct file *filp, struct kobject *kobj, = > I915_WRITE(GEN7_MISCCPCTL, misccpctl); > = > +out: > mutex_unlock(&drm_dev->struct_mutex); > = > return i; > -- = > 1.8.4 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC