From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 6/5] drm/i915: move more code to
 __i915_drm_thaw
Date: Fri, 13 Sep 2013 11:40:35 +0200
Message-ID: <20130913094035.GG5459@phenom.ffwll.local>
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To: Chris Wilson <chris@chris-wilson.co.uk>, Paulo Zanoni <przanoni@gmail.com>, intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
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On Thu, Sep 12, 2013 at 10:44:39PM +0100, Chris Wilson wrote:
> On Thu, Sep 12, 2013 at 06:06:43PM -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > 
> > Both callers had code to sanitize the uncore and restore the GTT
> > mappings just before calling __i915_drm_thaw, so Chris suggested I
> > should unify the code.
> > 
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> Slightly more tricky to prove would be that neither i915_restore_state()
> nor intel_opregion_setup depends upon the GTT (when modesetting is
> enabled) and so coalesce the check+lock into the main MODESET block.
> I think it's okay, there is a general ordering issue where we may point
> a few registers at the GTT before it is set, but I don't think they are
> used until afterwards. However, it is uncertain enough that I wouldn't
> reorder the code without the set of init flags Daniel keeps muttering on
> about to assert that we don't use partially restored state.
> 
> If Jesse wants to shave off a couple of microseconds from the resume
> time by doing so, he is more than welcome. :)
> 
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch