From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 1/5] drm/i915: don't save/restore LBB on
	Gen5+
Date: Fri, 13 Sep 2013 11:41:10 +0200
Message-ID: <20130913094110.GH5459@phenom.ffwll.local>
References: <1379005101-1500-1-git-send-email-przanoni@gmail.com>
	<20130912173618.GD20128@intel.com>
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To: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
List-Id: intel-gfx@lists.freedesktop.org

On Thu, Sep 12, 2013 at 08:36:18PM +0300, Ville Syrj=E4l=E4 wrote:
> On Thu, Sep 12, 2013 at 01:58:17PM -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > =

> > Because this PCI config register doesn't exist on Gen5+.
> > =

> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> =

> Yep. Can't see it in configdb. Actually it's only listed there for CTG
> and CLN, which I guess makes sense as non-mobile platforms probably
> don't have backlights. For BLB and ELK it's listed as reserved and RO,
> so I guess it doesn't hurt to poke it on them. If I'm wrong we could
> probably slap on an IS_MOBILE() check there too. Older stuff doesn't
> exist in configdb, so that's as far back as I can go.
> =

> Reviewed-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- =

Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch