From: Daniel Vetter <daniel@ffwll.ch>
To: Todd Previte <tprevite@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 4/4] drm/i915/dp: read DPCD PSR capability only on eDP
Date: Mon, 23 Sep 2013 09:29:49 +0200 [thread overview]
Message-ID: <20130923072949.GY32145@phenom.ffwll.local> (raw)
In-Reply-To: <523CCCCE.4000703@gmail.com>
On Fri, Sep 20, 2013 at 03:31:42PM -0700, Todd Previte wrote:
> On 09/20/2013 01:57 PM, Paulo Zanoni wrote:
> >2013/9/20 Todd Previte <tprevite@gmail.com>:
> >>On 09/20/2013 06:42 AM, Jani Nikula wrote:
> >>>Reduce AUX transactions for non-eDP.
> >>>
> >>>Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >>>---
> >>> drivers/gpu/drm/i915/intel_dp.c | 13 ++++++++-----
> >>> 1 file changed, 8 insertions(+), 5 deletions(-)
> >>>
> >>>diff --git a/drivers/gpu/drm/i915/intel_dp.c
> >>>b/drivers/gpu/drm/i915/intel_dp.c
> >>>index dd780bf..f2e16a1 100644
> >>>--- a/drivers/gpu/drm/i915/intel_dp.c
> >>>+++ b/drivers/gpu/drm/i915/intel_dp.c
> >>>@@ -2691,11 +2691,14 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
> >>> /* Check if the panel supports PSR */
> >>> memset(intel_dp->psr_dpcd, 0, sizeof(intel_dp->psr_dpcd));
> >>>- intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT,
> >>>- intel_dp->psr_dpcd,
> >>>- sizeof(intel_dp->psr_dpcd));
> >>>- if (is_edp_psr(intel_dp))
> >>>- DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
> >>>+ if (is_edp(intel_dp)) {
> >>>+ intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT,
> >>>+ intel_dp->psr_dpcd,
> >>>+
> >>>sizeof(intel_dp->psr_dpcd));
> >>>+ if (is_edp_psr(intel_dp))
> >>>+ DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
> >>>+ }
> >>>+
> >>> if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> >>> DP_DWN_STRM_PORT_PRESENT))
> >>> return true; /* native DP sink */
> >>
> >>Couldn't you just use is_edp_psr() at the top and not need the second
> >>is_edp() inside the if() statement? As in:
> >No, because is_edp_psr() only makes sense after we do the DPCD read
> >that checks the PSR bit.
>
> Yep, I see that now. And thus...
>
> [Reviewed-by]: Todd Previte <tprevite@gmail.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2013-09-23 7:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-20 13:42 [PATCH 0/4] drm/i915/dp: aux and dpcd fixes Jani Nikula
2013-09-20 13:42 ` [PATCH 1/4] drm/i915/dp: retry i2c-over-aux seven times on AUX DEFER Jani Nikula
2013-09-20 20:38 ` Todd Previte
2013-09-24 6:39 ` Jani Nikula
2013-09-27 11:51 ` Jani Nikula
2013-09-27 19:07 ` Todd Previte
2013-09-27 19:59 ` Daniel Vetter
2013-09-20 13:42 ` [PATCH 2/4] drm/i915/dp: increase i2c-over-aux retry interval " Jani Nikula
2013-09-20 20:56 ` Todd Previte
2013-09-20 21:53 ` Daniel Vetter
2013-09-20 13:42 ` [PATCH 3/4] drm/i915/dp: downstream port capabilities are not present in DPCD 1.0 Jani Nikula
2013-09-20 13:42 ` [PATCH 4/4] drm/i915/dp: read DPCD PSR capability only on eDP Jani Nikula
2013-09-20 20:50 ` Todd Previte
2013-09-20 20:57 ` Paulo Zanoni
2013-09-20 22:31 ` Todd Previte
2013-09-23 7:29 ` Daniel Vetter [this message]
2013-09-23 5:59 ` [PATCH 0/4] drm/i915/dp: aux and dpcd fixes Jani Nikula
2013-09-23 7:30 ` Daniel Vetter
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