From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH v2] drm/i915: Add HSW CRT output readout support Date: Tue, 24 Sep 2013 16:06:54 +0200 Message-ID: <20130924140654.GU13668@phenom.ffwll.local> References: <20130924105553.GO13668@phenom.ffwll.local> <1380021845-29846-1-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ee0-f53.google.com (mail-ee0-f53.google.com [74.125.83.53]) by gabe.freedesktop.org (Postfix) with ESMTP id ADE27E5C30 for ; Tue, 24 Sep 2013 07:06:37 -0700 (PDT) Received: by mail-ee0-f53.google.com with SMTP id b15so2506158eek.40 for ; Tue, 24 Sep 2013 07:06:36 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1380021845-29846-1-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Sep 24, 2013 at 02:24:05PM +0300, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > Call intel_ddi_get_config() to get the pipe_bpp settings from > DDI. > = > The sync polarity settings from DDI are irrelevant for CRT > output, so override them with data from the ADPA register. > = > v2: Extract intel_crt_get_flags() > = > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=3D69691 > Tested-by: Qingshuai Tian > Signed-off-by: Ville Syrj=E4l=E4 Merged this guy to dinq. Thanks, Daniel -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch