From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH] drm/i915: backlight combination mode bit is
 gen4 only
Date: Tue, 24 Sep 2013 17:04:39 +0200
Message-ID: <20130924150413.GA12663@phenom.ffwll.local>
References: <1380030279-9745-1-git-send-email-jani.nikula@intel.com>
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To: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

On Tue, Sep 24, 2013 at 05:41:21PM +0300, Ville Syrj=E4l=E4 wrote:
> On Tue, Sep 24, 2013 at 04:44:39PM +0300, Jani Nikula wrote:
> > Not valid for later non-PCH split platforms such as VLV.
> > =

> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> =

> The bit is mbz on VLV, so I guess it should be 0, but better safe than
> sorry, and it gets rid of a useless register read.
> =

> Reviewed-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- =

Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch