From: Daniel Vetter <daniel@ffwll.ch>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/vlv: reset DPIO on load and resume
Date: Thu, 26 Sep 2013 23:51:52 +0200 [thread overview]
Message-ID: <20130926215152.GW12663@phenom.ffwll.local> (raw)
In-Reply-To: <1380231554-2678-1-git-send-email-jbarnes@virtuousgeek.org>
On Thu, Sep 26, 2013 at 02:39:14PM -0700, Jesse Barnes wrote:
> This fixes resume on my test platform, since I think some DPIO bits need
> recalibration.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=69166
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/intel_display.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index f52e6d4..320f729 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1359,6 +1359,17 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
> assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMID);
> }
>
> +static void intel_init_dpio(struct drm_device *dev)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> +
> + if (!IS_VALLEYVIEW(dev))
> + return;
> +
> + /* Reset in case DPIO was stuck across suspend/resume or boot */
> + I915_WRITE(DPIO_CTL, I915_READ(DPIO_CTL) | DPIO_RESET);
> +}
> +
> static void vlv_enable_pll(struct intel_crtc *crtc)
> {
> struct drm_device *dev = crtc->base.dev;
> @@ -10279,6 +10290,8 @@ void intel_modeset_init_hw(struct drm_device *dev)
> {
> intel_prepare_ddi(dev);
>
> + intel_init_dpio(dev);
> +
> intel_init_clock_gating(dev);
Can't you just put this into the clock_gate function? I'd like to cut down
a bit on our general clutter in the setup code since tbh I've completely
lost the overview of what goes where ...
-Daniel
>
> mutex_lock(&dev->struct_mutex);
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2013-09-26 21:51 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-26 21:39 [PATCH] drm/i915/vlv: reset DPIO on load and resume Jesse Barnes
2013-09-26 21:51 ` Daniel Vetter [this message]
2013-09-26 21:58 ` Jesse Barnes
2013-09-27 6:11 ` Lee, Chon Ming
2013-09-27 9:34 ` Ville Syrjälä
2013-10-03 16:38 ` Ville Syrjälä
2013-10-03 16:46 ` Jesse Barnes
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