From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915/vlv: reset DPIO on load and resume Date: Fri, 27 Sep 2013 12:34:31 +0300 Message-ID: <20130927093431.GA14385@intel.com> References: <1380231554-2678-1-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id E7187E6617 for ; Fri, 27 Sep 2013 02:34:34 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1380231554-2678-1-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Sep 26, 2013 at 02:39:14PM -0700, Jesse Barnes wrote: > This fixes resume on my test platform, since I think some DPIO bits need > recalibration. > = > References: https://bugs.freedesktop.org/show_bug.cgi?id=3D69166 > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/intel_display.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > = > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index f52e6d4..320f729 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1359,6 +1359,17 @@ static void assert_pch_ports_disabled(struct drm_i= 915_private *dev_priv, > assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMID); > } > = > +static void intel_init_dpio(struct drm_device *dev) > +{ > + struct drm_i915_private *dev_priv =3D dev->dev_private; > + > + if (!IS_VALLEYVIEW(dev)) > + return; > + > + /* Reset in case DPIO was stuck across suspend/resume or boot */ > + I915_WRITE(DPIO_CTL, I915_READ(DPIO_CTL) | DPIO_RESET); This will deassert the common lane reset, so the comment is confusing, as is the name we have given this bit. > +} > + > static void vlv_enable_pll(struct intel_crtc *crtc) > { > struct drm_device *dev =3D crtc->base.dev; > @@ -10279,6 +10290,8 @@ void intel_modeset_init_hw(struct drm_device *dev) > { > intel_prepare_ddi(dev); > = > + intel_init_dpio(dev); > + > intel_init_clock_gating(dev); > = > mutex_lock(&dev->struct_mutex); > -- = > 1.8.3.1 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC