* [PATCH 1/2] drm/i915/vlv: use lower precision RC6 counter
@ 2013-09-27 0:55 Jesse Barnes
2013-09-27 0:55 ` [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency v2 Jesse Barnes
0 siblings, 1 reply; 4+ messages in thread
From: Jesse Barnes @ 2013-09-27 0:55 UTC (permalink / raw)
To: intel-gfx
And add some reg defines while we're at it. Since the units of the RC6
residency counter are actually in CZ clocks, we want to just use the
high bits or we'll overflow too frequently.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++++
drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 00fda45..cf995bb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4721,6 +4721,10 @@
GEN6_PM_RP_DOWN_TIMEOUT)
#define GEN6_GT_GFX_RC6_LOCKED 0x138104
+#define VLV_COUNTER_CONTROL 0x138104
+#define VLV_COUNT_RANGE_HIGH (1<<15)
+#define VLV_MEDIA_RC6_COUNT_EN (1<<1)
+#define VLV_RENDER_RC6_COUNT_EN (1<<0)
#define GEN6_GT_GFX_RC6 0x138108
#define GEN6_GT_GFX_RC6p 0x13810C
#define GEN6_GT_GFX_RC6pp 0x138110
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2ac1c2f..102fc49 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3837,7 +3837,10 @@ static void valleyview_enable_rps(struct drm_device *dev)
I915_WRITE(GEN6_RC6_THRESHOLD, 0xc350);
/* allows RC6 residency counter to work */
- I915_WRITE(0x138104, _MASKED_BIT_ENABLE(0x3));
+ I915_WRITE(VLV_COUNTER_CONTROL,
+ _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH |
+ VLV_MEDIA_RC6_COUNT_EN |
+ VLV_RENDER_RC6_COUNT_EN));
if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
rc6_mode = GEN7_RC_CTL_TO_MODE;
I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency v2
2013-09-27 0:55 [PATCH 1/2] drm/i915/vlv: use lower precision RC6 counter Jesse Barnes
@ 2013-09-27 0:55 ` Jesse Barnes
2013-09-27 8:15 ` Chris Wilson
0 siblings, 1 reply; 4+ messages in thread
From: Jesse Barnes @ 2013-09-27 0:55 UTC (permalink / raw)
To: intel-gfx
We need to use the clock control reg to figure out how many CZ clks are in
30ns and use that as the basis for our RC6 residency calculations.
v2: use ULL everywhere for consistency (Chris)
factor out bias for clarity (Chris)
References: https://bugs.freedesktop.org/show_bug.cgi?id=69692
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/i915_sysfs.c | 22 ++++++++++++++++++++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cf995bb..6f8d0cf 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1797,6 +1797,9 @@
*/
#define HSW_CXT_TOTAL_SIZE (17 * PAGE_SIZE)
+#define VLV_CLK_CTL2 0x101104
+#define CLK_CTL2_CZCOUNT_30NS_SHIFT 28
+
/*
* Overlay regs
*/
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 44f4c1a..8003886 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -37,12 +37,30 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
{
struct drm_i915_private *dev_priv = dev->dev_private;
u64 raw_time; /* 32b value may overflow during fixed point math */
+ u64 units = 128ULL, div = 100000ULL, bias = 100ULL;
if (!intel_enable_rc6(dev))
return 0;
- raw_time = I915_READ(reg) * 128ULL;
- return DIV_ROUND_UP_ULL(raw_time, 100000);
+ /* On VLV, residency time is in CZ units rather than 1.28us */
+ if (IS_VALLEYVIEW(dev)) {
+ u32 clkctl2;
+
+ clkctl2 = I915_READ(VLV_CLK_CTL2) >>
+ CLK_CTL2_CZCOUNT_30NS_SHIFT;
+ if (!clkctl2) {
+ WARN(!clkctl2, "bogus CZ count value");
+ return 0;
+ }
+ units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);
+ if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
+ units <<= 8;
+
+ div = 1000000ULL * bias;
+ }
+
+ raw_time = I915_READ(reg) * units;
+ return DIV_ROUND_UP_ULL(raw_time, div);
}
static ssize_t
--
1.8.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency v2
2013-09-27 0:55 ` [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency v2 Jesse Barnes
@ 2013-09-27 8:15 ` Chris Wilson
2013-09-27 19:37 ` Daniel Vetter
0 siblings, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2013-09-27 8:15 UTC (permalink / raw)
To: Jesse Barnes; +Cc: intel-gfx
On Thu, Sep 26, 2013 at 05:55:58PM -0700, Jesse Barnes wrote:
> We need to use the clock control reg to figure out how many CZ clks are in
> 30ns and use that as the basis for our RC6 residency calculations.
>
> v2: use ULL everywhere for consistency (Chris)
> factor out bias for clarity (Chris)
I liked the NSEC_PER_MSEC as well :)
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=69692
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/i915_sysfs.c | 22 ++++++++++++++++++++--
> 2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index cf995bb..6f8d0cf 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1797,6 +1797,9 @@
> */
> #define HSW_CXT_TOTAL_SIZE (17 * PAGE_SIZE)
>
> +#define VLV_CLK_CTL2 0x101104
> +#define CLK_CTL2_CZCOUNT_30NS_SHIFT 28
> +
> /*
> * Overlay regs
> */
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 44f4c1a..8003886 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -37,12 +37,30 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> u64 raw_time; /* 32b value may overflow during fixed point math */
> + u64 units = 128ULL, div = 100000ULL, bias = 100ULL;
>
> if (!intel_enable_rc6(dev))
> return 0;
>
> - raw_time = I915_READ(reg) * 128ULL;
> - return DIV_ROUND_UP_ULL(raw_time, 100000);
> + /* On VLV, residency time is in CZ units rather than 1.28us */
> + if (IS_VALLEYVIEW(dev)) {
> + u32 clkctl2;
> +
> + clkctl2 = I915_READ(VLV_CLK_CTL2) >>
> + CLK_CTL2_CZCOUNT_30NS_SHIFT;
> + if (!clkctl2) {
> + WARN(!clkctl2, "bogus CZ count value");
> + return 0;
> + }
> + units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);
> + if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> + units <<= 8;
> +
> + div = 1000000ULL * bias;
> + }
/* On VLV, residency time is in CZ units rather than 1.28us */
if (IS_VALLEVIEW9dev)) {
u32 clkctl2;
clkctl2 = I915_READ(VLV_CLK_CTL2) >>
CLK_CTL2_CZCOUNT_30NS_SHIFT;
if (!clkctl2) {
WARN(!clkctl2, "bogus CZ count value");
return 0;
}
units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);
if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
units <<= 8;
div = NSEC_PER_MSEC * bias;
} else {
units = 128;
div = USEC_PER_MSEC * bias;
}
raw_time = I915_READ(reg) * units;
return DIV_ROUND_UP_ULL(raw_time, div);
Either way, with or without the extra constants,
Both patches,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency v2
2013-09-27 8:15 ` Chris Wilson
@ 2013-09-27 19:37 ` Daniel Vetter
0 siblings, 0 replies; 4+ messages in thread
From: Daniel Vetter @ 2013-09-27 19:37 UTC (permalink / raw)
To: Chris Wilson, Jesse Barnes, intel-gfx
On Fri, Sep 27, 2013 at 09:15:58AM +0100, Chris Wilson wrote:
> On Thu, Sep 26, 2013 at 05:55:58PM -0700, Jesse Barnes wrote:
> > We need to use the clock control reg to figure out how many CZ clks are in
> > 30ns and use that as the basis for our RC6 residency calculations.
> >
> > v2: use ULL everywhere for consistency (Chris)
> > factor out bias for clarity (Chris)
>
> I liked the NSEC_PER_MSEC as well :)
>
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=69692
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 3 +++
> > drivers/gpu/drm/i915/i915_sysfs.c | 22 ++++++++++++++++++++--
> > 2 files changed, 23 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index cf995bb..6f8d0cf 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -1797,6 +1797,9 @@
> > */
> > #define HSW_CXT_TOTAL_SIZE (17 * PAGE_SIZE)
> >
> > +#define VLV_CLK_CTL2 0x101104
> > +#define CLK_CTL2_CZCOUNT_30NS_SHIFT 28
> > +
> > /*
> > * Overlay regs
> > */
> > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> > index 44f4c1a..8003886 100644
> > --- a/drivers/gpu/drm/i915/i915_sysfs.c
> > +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> > @@ -37,12 +37,30 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > u64 raw_time; /* 32b value may overflow during fixed point math */
> > + u64 units = 128ULL, div = 100000ULL, bias = 100ULL;
> >
> > if (!intel_enable_rc6(dev))
> > return 0;
> >
> > - raw_time = I915_READ(reg) * 128ULL;
> > - return DIV_ROUND_UP_ULL(raw_time, 100000);
> > + /* On VLV, residency time is in CZ units rather than 1.28us */
> > + if (IS_VALLEYVIEW(dev)) {
> > + u32 clkctl2;
> > +
> > + clkctl2 = I915_READ(VLV_CLK_CTL2) >>
> > + CLK_CTL2_CZCOUNT_30NS_SHIFT;
> > + if (!clkctl2) {
> > + WARN(!clkctl2, "bogus CZ count value");
> > + return 0;
> > + }
> > + units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);
> > + if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> > + units <<= 8;
> > +
> > + div = 1000000ULL * bias;
> > + }
>
> /* On VLV, residency time is in CZ units rather than 1.28us */
> if (IS_VALLEVIEW9dev)) {
> u32 clkctl2;
>
> clkctl2 = I915_READ(VLV_CLK_CTL2) >>
> CLK_CTL2_CZCOUNT_30NS_SHIFT;
> if (!clkctl2) {
> WARN(!clkctl2, "bogus CZ count value");
> return 0;
> }
>
> units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);
> if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> units <<= 8;
>
> div = NSEC_PER_MSEC * bias;
> } else {
> units = 128;
> div = USEC_PER_MSEC * bias;
> }
>
> raw_time = I915_READ(reg) * units;
> return DIV_ROUND_UP_ULL(raw_time, div);
>
> Either way, with or without the extra constants,
> Both patches,
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Both merged without further bikeshedding applied. Thanks for
patches&review.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 4+ messages in thread
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