From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915/vlv: reset DPIO on load and resume Date: Thu, 3 Oct 2013 19:38:26 +0300 Message-ID: <20131003163826.GZ9395@intel.com> References: <1380231554-2678-1-git-send-email-jbarnes@virtuousgeek.org> <20130927093431.GA14385@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 592C9E5EAA for ; Thu, 3 Oct 2013 09:39:32 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20130927093431.GA14385@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Sep 27, 2013 at 12:34:31PM +0300, Ville Syrj=E4l=E4 wrote: > On Thu, Sep 26, 2013 at 02:39:14PM -0700, Jesse Barnes wrote: > > This fixes resume on my test platform, since I think some DPIO bits need > > recalibration. > > = > > References: https://bugs.freedesktop.org/show_bug.cgi?id=3D69166 > > Signed-off-by: Jesse Barnes > > --- > > drivers/gpu/drm/i915/intel_display.c | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > = > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i91= 5/intel_display.c > > index f52e6d4..320f729 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -1359,6 +1359,17 @@ static void assert_pch_ports_disabled(struct drm= _i915_private *dev_priv, > > assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMID); > > } > > = > > +static void intel_init_dpio(struct drm_device *dev) > > +{ > > + struct drm_i915_private *dev_priv =3D dev->dev_private; > > + > > + if (!IS_VALLEYVIEW(dev)) > > + return; > > + > > + /* Reset in case DPIO was stuck across suspend/resume or boot */ > > + I915_WRITE(DPIO_CTL, I915_READ(DPIO_CTL) | DPIO_RESET); > = > This will deassert the common lane reset, so the comment is confusing, > as is the name we have given this bit. And the commit subject and text is also confusing in the same way. And we should do this after setting up the CRI clock. > = > > +} > > + > > static void vlv_enable_pll(struct intel_crtc *crtc) > > { > > struct drm_device *dev =3D crtc->base.dev; > > @@ -10279,6 +10290,8 @@ void intel_modeset_init_hw(struct drm_device *d= ev) > > { > > intel_prepare_ddi(dev); > > = > > + intel_init_dpio(dev); > > + > > intel_init_clock_gating(dev); > > = > > mutex_lock(&dev->struct_mutex); > > -- = > > 1.8.3.1 > > = > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > = > -- = > Ville Syrj=E4l=E4 > Intel OTC > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC