From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH] drm/i915/vlv: Turn off power gate for
 BIOS-less system.
Date: Fri, 4 Oct 2013 10:26:36 +0200
Message-ID: <20131004082636.GL31334@phenom.ffwll.local>
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To: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
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On Thu, Oct 03, 2013 at 07:34:48PM +0300, Ville Syrj=E4l=E4 wrote:
> On Thu, Oct 03, 2013 at 11:16:17PM +0800, Chon Ming Lee wrote:
> > During system boot up, by default, the power gate for render, media and
> > display well still power gated.  Normally, BIOS will turn off the power
> > gate.  In the BIOS-less system, the driver need to turn off the power
> > gate very early during driver load.
> > =

> > v2: Move this to intel_uncore_sanitize to allow it to get call during
> > resume path. (Daniel)
> > v3: Remove redundant write 0 to DPIO_CTL, and use DPIO_RESET instead of
> > just 0x1 (Ville)
> >     Add turn of power gate for display 2d/render well/media well.
> > v4: Remove toggle cmnreset in intel_uncore_sanitize.  Cmnreset should
> > toggle after CRI clock source has been selected.  Jesse DPIO reset patch
> > which toggle the cmnreset in intel_modeset_init_hw() should handle it.
> > (Ville)
> > =

> > Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
> =

> Looks OK as a short term solution.
> =

> Reviewed-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- =

Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch