* [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value
@ 2013-10-04 12:08 Jani Nikula
2013-10-04 12:08 ` [PATCH 2/2] drm/i915/dp: update training set in a burst write with training pattern set Jani Nikula
2013-10-04 12:44 ` [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value Daniel Vetter
0 siblings, 2 replies; 7+ messages in thread
From: Jani Nikula @ 2013-10-04 12:08 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 60118da..0ed7717 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2406,7 +2406,7 @@ static bool
intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
uint8_t dp_train_pat)
{
- memset(intel_dp->train_set, 0, 4);
+ memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
intel_dp_set_signal_levels(intel_dp, DP);
return intel_dp_set_link_train(intel_dp, DP, dp_train_pat);
}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/2] drm/i915/dp: update training set in a burst write with training pattern set
2013-10-04 12:08 [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value Jani Nikula
@ 2013-10-04 12:08 ` Jani Nikula
2013-10-04 12:48 ` Ville Syrjälä
2013-10-04 12:44 ` [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value Daniel Vetter
1 sibling, 1 reply; 7+ messages in thread
From: Jani Nikula @ 2013-10-04 12:08 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
The DP spec allows this, and requires it when full link training is
started with non-minimum voltage swing and/or non-zero pre-emphasis.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0ed7717..bfd0e76 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2314,7 +2314,8 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
struct drm_device *dev = intel_dig_port->base.base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
enum port port = intel_dig_port->port;
- int ret;
+ uint8_t buf[sizeof(intel_dp->train_set) + 1];
+ int ret, len;
if (HAS_DDI(dev)) {
uint32_t temp = I915_READ(DP_TP_CTL(port));
@@ -2384,22 +2385,21 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
I915_WRITE(intel_dp->output_reg, *DP);
POSTING_READ(intel_dp->output_reg);
- ret = intel_dp_aux_native_write_1(intel_dp, DP_TRAINING_PATTERN_SET,
- dp_train_pat);
- if (ret != 1)
- return false;
-
- if ((dp_train_pat & DP_TRAINING_PATTERN_MASK) !=
+ buf[0] = dp_train_pat;
+ if ((dp_train_pat & DP_TRAINING_PATTERN_MASK) ==
DP_TRAINING_PATTERN_DISABLE) {
- ret = intel_dp_aux_native_write(intel_dp,
- DP_TRAINING_LANE0_SET,
- intel_dp->train_set,
- intel_dp->lane_count);
- if (ret != intel_dp->lane_count)
- return false;
+ /* don't write DP_TRAINING_LANEx_SET on disable */
+ len = 1;
+ } else {
+ /* DP_TRAINING_LANEx_SET follow DP_TRAINING_PATTERN_SET */
+ memcpy(buf + 1, intel_dp->train_set, intel_dp->lane_count);
+ len = intel_dp->lane_count + 1;
}
- return true;
+ ret = intel_dp_aux_native_write(intel_dp, DP_TRAINING_PATTERN_SET,
+ buf, len);
+
+ return ret == len;
}
static bool
--
1.7.9.5
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 2/2] drm/i915/dp: update training set in a burst write with training pattern set
2013-10-04 12:08 ` [PATCH 2/2] drm/i915/dp: update training set in a burst write with training pattern set Jani Nikula
@ 2013-10-04 12:48 ` Ville Syrjälä
0 siblings, 0 replies; 7+ messages in thread
From: Ville Syrjälä @ 2013-10-04 12:48 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Fri, Oct 04, 2013 at 03:08:48PM +0300, Jani Nikula wrote:
> The DP spec allows this, and requires it when full link training is
> started with non-minimum voltage swing and/or non-zero pre-emphasis.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Looks good.
For the series:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 28 ++++++++++++++--------------
> 1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 0ed7717..bfd0e76 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2314,7 +2314,8 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
> struct drm_device *dev = intel_dig_port->base.base.dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> enum port port = intel_dig_port->port;
> - int ret;
> + uint8_t buf[sizeof(intel_dp->train_set) + 1];
> + int ret, len;
>
> if (HAS_DDI(dev)) {
> uint32_t temp = I915_READ(DP_TP_CTL(port));
> @@ -2384,22 +2385,21 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
> I915_WRITE(intel_dp->output_reg, *DP);
> POSTING_READ(intel_dp->output_reg);
>
> - ret = intel_dp_aux_native_write_1(intel_dp, DP_TRAINING_PATTERN_SET,
> - dp_train_pat);
> - if (ret != 1)
> - return false;
> -
> - if ((dp_train_pat & DP_TRAINING_PATTERN_MASK) !=
> + buf[0] = dp_train_pat;
> + if ((dp_train_pat & DP_TRAINING_PATTERN_MASK) ==
> DP_TRAINING_PATTERN_DISABLE) {
> - ret = intel_dp_aux_native_write(intel_dp,
> - DP_TRAINING_LANE0_SET,
> - intel_dp->train_set,
> - intel_dp->lane_count);
> - if (ret != intel_dp->lane_count)
> - return false;
> + /* don't write DP_TRAINING_LANEx_SET on disable */
> + len = 1;
> + } else {
> + /* DP_TRAINING_LANEx_SET follow DP_TRAINING_PATTERN_SET */
> + memcpy(buf + 1, intel_dp->train_set, intel_dp->lane_count);
> + len = intel_dp->lane_count + 1;
> }
>
> - return true;
> + ret = intel_dp_aux_native_write(intel_dp, DP_TRAINING_PATTERN_SET,
> + buf, len);
> +
> + return ret == len;
> }
>
> static bool
> --
> 1.7.9.5
--
Ville Syrjälä
Intel OTC
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value
2013-10-04 12:08 [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value Jani Nikula
2013-10-04 12:08 ` [PATCH 2/2] drm/i915/dp: update training set in a burst write with training pattern set Jani Nikula
@ 2013-10-04 12:44 ` Daniel Vetter
2013-10-04 15:28 ` Jani Nikula
2013-10-09 9:54 ` Jani Nikula
1 sibling, 2 replies; 7+ messages in thread
From: Daniel Vetter @ 2013-10-04 12:44 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Fri, Oct 04, 2013 at 03:08:47PM +0300, Jani Nikula wrote:
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 60118da..0ed7717 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2406,7 +2406,7 @@ static bool
> intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
> uint8_t dp_train_pat)
> {
> - memset(intel_dp->train_set, 0, 4);
> + memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
Oh, missed that one in my big review of alloc/memset. Patch merged,
thanks.
-Daniel
> intel_dp_set_signal_levels(intel_dp, DP);
> return intel_dp_set_link_train(intel_dp, DP, dp_train_pat);
> }
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value
2013-10-04 12:44 ` [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value Daniel Vetter
@ 2013-10-04 15:28 ` Jani Nikula
2013-10-09 9:54 ` Jani Nikula
1 sibling, 0 replies; 7+ messages in thread
From: Jani Nikula @ 2013-10-04 15:28 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx
On Fri, 04 Oct 2013, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Fri, Oct 04, 2013 at 03:08:47PM +0300, Jani Nikula wrote:
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_dp.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> index 60118da..0ed7717 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -2406,7 +2406,7 @@ static bool
>> intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
>> uint8_t dp_train_pat)
>> {
>> - memset(intel_dp->train_set, 0, 4);
>> + memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
>
> Oh, missed that one in my big review of alloc/memset.
You didn't, I sneaked it in afterwards...
Jani.
> -Daniel
>
>> intel_dp_set_signal_levels(intel_dp, DP);
>> return intel_dp_set_link_train(intel_dp, DP, dp_train_pat);
>> }
>> --
>> 1.7.9.5
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value
2013-10-04 12:44 ` [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value Daniel Vetter
2013-10-04 15:28 ` Jani Nikula
@ 2013-10-09 9:54 ` Jani Nikula
2013-10-09 10:47 ` Daniel Vetter
1 sibling, 1 reply; 7+ messages in thread
From: Jani Nikula @ 2013-10-09 9:54 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx
On Fri, 04 Oct 2013, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Fri, Oct 04, 2013 at 03:08:47PM +0300, Jani Nikula wrote:
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_dp.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> index 60118da..0ed7717 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -2406,7 +2406,7 @@ static bool
>> intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
>> uint8_t dp_train_pat)
>> {
>> - memset(intel_dp->train_set, 0, 4);
>> + memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
>
> Oh, missed that one in my big review of alloc/memset. Patch merged,
> thanks.
How about patch 2/2?
Jani.
--
Jani Nikula, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value
2013-10-09 9:54 ` Jani Nikula
@ 2013-10-09 10:47 ` Daniel Vetter
0 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2013-10-09 10:47 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Wed, Oct 09, 2013 at 12:54:48PM +0300, Jani Nikula wrote:
> On Fri, 04 Oct 2013, Daniel Vetter <daniel@ffwll.ch> wrote:
> > On Fri, Oct 04, 2013 at 03:08:47PM +0300, Jani Nikula wrote:
> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> ---
> >> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> >> index 60118da..0ed7717 100644
> >> --- a/drivers/gpu/drm/i915/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/intel_dp.c
> >> @@ -2406,7 +2406,7 @@ static bool
> >> intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
> >> uint8_t dp_train_pat)
> >> {
> >> - memset(intel_dp->train_set, 0, 4);
> >> + memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
> >
> > Oh, missed that one in my big review of alloc/memset. Patch merged,
> > thanks.
>
> How about patch 2/2?
Oh, I've missed Ville's r-b. Now merged to dinq.
Thanks for poking, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2013-10-09 10:46 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-10-04 12:08 [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value Jani Nikula
2013-10-04 12:08 ` [PATCH 2/2] drm/i915/dp: update training set in a burst write with training pattern set Jani Nikula
2013-10-04 12:48 ` Ville Syrjälä
2013-10-04 12:44 ` [PATCH 1/2] drm/i915/dp: use sizeof for memset instead of magic value Daniel Vetter
2013-10-04 15:28 ` Jani Nikula
2013-10-09 9:54 ` Jani Nikula
2013-10-09 10:47 ` Daniel Vetter
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox