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From: Daniel Vetter <daniel@ffwll.ch>
To: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 00/14] drm/i915: VLV DPLL calc fixes and cleanups
Date: Fri, 4 Oct 2013 15:34:43 +0200	[thread overview]
Message-ID: <20131004133443.GS31334@phenom.ffwll.local> (raw)
In-Reply-To: <87zjqubb8e.fsf@gaia.fi.intel.com>

On Mon, Sep 30, 2013 at 06:06:09PM +0300, Mika Kuoppala wrote:
> ville.syrjala@linux.intel.com writes:
> 
> > I only wanted to do some small cleanups to vlv_find_best_dpll(),
> > but it seems I went slightly mad again.
> >
> > After realizing that I have to cook up quite a few more patches,
> > I decided to also split up the functional changes from my earlier
> > vlv_find_best_dpll() rewrite patch. And this series is the result.
> >
> > And the usual warning applies: Totally untested
> >
> > Ville Syrjälä (14):
> >       drm/i915: Eliminate one indent leel from vlv_find_best_dpll
> >       drm/i915: Use DIV_ROUND_CLOSEST()
> >       drm/i915: Make vlv_find_best_dpll() ppm calculation safe
> >       drm/i915: Don't underflow bestppm
> >       drm/i915: Rewrite vlv_find_best_dpll()
> >       drm/i915: De-magic the VLV p2 divider step size
> >       drm/i915: Make sure we respect n.max on VLV
> >       drm/i915: Clarify VLV PLL p1 limits
> >       drm/i915: Allow p1 divider 2 on VLV
> >       drm/i915: Respect p2 divider minimum limit on VLV
> >       drm/i915: Remove the unused p and m limits for VLV
> >       drm/i915: Remove unused dot_limit from VLV PLL limits
> >       drm/i915: intel_limits_vlv_dac and intel_limits_vlv_hdmi are the same
> >       drm/i915: Don't lie about findind suitable PLL settings on VLV
> >
> >  drivers/gpu/drm/i915/intel_display.c | 123 +++++++++++++++++++++++++++++++++++----------------------------------------------------
> >  1 file changed, 49 insertions(+), 74 deletions(-)
> >
> 
> I have read these through and tested the algorithm
> against the values in the freq table excel sheet.
> 
> The pre-patchset algorithm sometimes skipped large but 
> valid p1 values due to underflow of bestppm - 10.
> Patch 04/15 fixes this issue.
> 
> After Ville's patches the find_best_dpll() 
> seems to match exactly against what the sheet gives.
> Atleast on selected set of rates.
> 
> And the whole thing is much more readable now, so:
> 
> Patches: 3-4, 5 v3, 6-14 and 15/14
> 
> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

I've merged them all - we're early in the -testing cycle so fixing fallout
(if there is any) shouldn't be too ugly. Thanks for the patches&review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

      reply	other threads:[~2013-10-04 13:34 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-24 18:26 [PATCH 00/14] drm/i915: VLV DPLL calc fixes and cleanups ville.syrjala
2013-09-24 18:26 ` [PATCH 01/14] drm/i915: Eliminate one indent leel from vlv_find_best_dpll ville.syrjala
2013-09-26 10:04   ` Mika Kuoppala
2013-09-24 18:26 ` [PATCH 02/14] drm/i915: Use DIV_ROUND_CLOSEST() ville.syrjala
2013-09-26 10:09   ` Mika Kuoppala
2013-09-27 19:35     ` Daniel Vetter
2013-09-24 18:26 ` [PATCH 03/14] drm/i915: Make vlv_find_best_dpll() ppm calculation safe ville.syrjala
2013-09-24 18:26 ` [PATCH 04/14] drm/i915: Don't underflow bestppm ville.syrjala
2013-09-24 18:26 ` [PATCH v2 05/14] drm/i915: Rewrite vlv_find_best_dpll() ville.syrjala
2013-09-26 15:30   ` Mika Kuoppala
2013-09-27 13:01     ` Ville Syrjälä
2013-09-27 13:55     ` [PATCH 15/14] drm/i915: Use intel_PLL_is_valid() in vlv_find_best_dpll() ville.syrjala
2013-09-27 11:55   ` [PATCH v2 05/14] drm/i915: Rewrite vlv_find_best_dpll() Mika Kuoppala
2013-09-27 13:04     ` Ville Syrjälä
2013-09-27 13:54     ` [PATCH v3 " ville.syrjala
2013-09-24 18:26 ` [PATCH 06/14] drm/i915: De-magic the VLV p2 divider step size ville.syrjala
2013-09-24 18:26 ` [PATCH 07/14] drm/i915: Make sure we respect n.max on VLV ville.syrjala
2013-09-24 18:26 ` [PATCH 08/14] drm/i915: Clarify VLV PLL p1 limits ville.syrjala
2013-09-24 18:26 ` [PATCH 09/14] drm/i915: Allow p1 divider 2 on VLV ville.syrjala
2013-09-24 18:26 ` [PATCH 10/14] drm/i915: Respect p2 divider minimum limit " ville.syrjala
2013-09-24 18:26 ` [PATCH 11/14] drm/i915: Remove the unused p and m limits for VLV ville.syrjala
2013-09-24 18:26 ` [PATCH 12/14] drm/i915: Remove unused dot_limit from VLV PLL limits ville.syrjala
2013-09-24 18:26 ` [PATCH 13/14] drm/i915: intel_limits_vlv_dac and intel_limits_vlv_hdmi are the same ville.syrjala
2013-09-24 18:26 ` [PATCH 14/14] drm/i915: Don't lie about findind suitable PLL settings on VLV ville.syrjala
2013-09-24 19:15 ` [PATCH 00/14] drm/i915: VLV DPLL calc fixes and cleanups Daniel Vetter
2013-09-25  7:38   ` [PATCH] drm/i915: Fix 1.62 DP DPLL settings for VLV ville.syrjala
2013-09-30 15:06 ` [PATCH 00/14] drm/i915: VLV DPLL calc fixes and cleanups Mika Kuoppala
2013-10-04 13:34   ` Daniel Vetter [this message]

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