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* [PATCH] drm/i915: disable LVDS clock gating on CPT
@ 2013-10-01 20:18 Jesse Barnes
  2013-10-01 21:05 ` Rodrigo Vivi
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Jesse Barnes @ 2013-10-01 20:18 UTC (permalink / raw)
  To: intel-gfx

Needed to prevent display corruption in high res panels.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_reg.h |    2 ++
 drivers/gpu/drm/i915/intel_pm.c |    4 +++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 96fd2ce..cca670a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4338,7 +4338,9 @@
 #define FDI_RX_CHICKEN(pipe) _PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN)
 
 #define SOUTH_DSPCLK_GATE_D	0xc2020
+#define  PCH_LVDSUNIT_CLOCK_GATE_DISABLE (1<<30)
 #define  PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29)
+#define  PCH_LVDSUNIT2_CLOCK_GATE_DISABLE (1<<14)
 #define  PCH_LP_PARTITION_LEVEL_DISABLE  (1<<12)
 
 /* CPU: FDI_TX */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 698257c..f6765e0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4791,7 +4791,9 @@ static void cpt_init_clock_gating(struct drm_device *dev)
 	 * gating for the panel power sequencer or it will fail to
 	 * start up when no ports are active.
 	 */
-	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
+	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE |
+		   PCH_LVDSUNIT_CLOCK_GATE_DISABLE |
+		   PCH_LVDSUNIT2_CLOCK_GATE_DISABLE);
 	I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |
 		   DPLS_EDP_PPS_FIX_DIS);
 	/* The below fixes the weird display corruption, a few pixels shifted
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915: disable LVDS clock gating on CPT
  2013-10-01 20:18 [PATCH] drm/i915: disable LVDS clock gating on CPT Jesse Barnes
@ 2013-10-01 21:05 ` Rodrigo Vivi
  2013-10-02  8:02 ` Jani Nikula
  2013-10-02 17:34 ` [PATCH] drm/i915: disable LVDS clock gating on CPT v2 Jesse Barnes
  2 siblings, 0 replies; 8+ messages in thread
From: Rodrigo Vivi @ 2013-10-01 21:05 UTC (permalink / raw)
  To: Jesse Barnes; +Cc: intel-gfx

spec of this reg doesn't say much, but if what you want are:

On Tue, Oct 1, 2013 at 5:18 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> Needed to prevent display corruption in high res panels.
>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_reg.h |    2 ++
>  drivers/gpu/drm/i915/intel_pm.c |    4 +++-
>  2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 96fd2ce..cca670a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4338,7 +4338,9 @@
>  #define FDI_RX_CHICKEN(pipe) _PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN)
>
>  #define SOUTH_DSPCLK_GATE_D    0xc2020
> +#define  PCH_LVDSUNIT_CLOCK_GATE_DISABLE (1<<30)

30
dplunit Gating Disable

>  #define  PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29)
> +#define  PCH_LVDSUNIT2_CLOCK_GATE_DISABLE (1<<14)

14
cpunit Gating Disable


than feel free to use:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

>  #define  PCH_LP_PARTITION_LEVEL_DISABLE  (1<<12)
>
>  /* CPU: FDI_TX */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 698257c..f6765e0 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4791,7 +4791,9 @@ static void cpt_init_clock_gating(struct drm_device *dev)
>          * gating for the panel power sequencer or it will fail to
>          * start up when no ports are active.
>          */
> -       I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
> +       I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE |
> +                  PCH_LVDSUNIT_CLOCK_GATE_DISABLE |
> +                  PCH_LVDSUNIT2_CLOCK_GATE_DISABLE);
>         I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |
>                    DPLS_EDP_PPS_FIX_DIS);
>         /* The below fixes the weird display corruption, a few pixels shifted
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915: disable LVDS clock gating on CPT
  2013-10-01 20:18 [PATCH] drm/i915: disable LVDS clock gating on CPT Jesse Barnes
  2013-10-01 21:05 ` Rodrigo Vivi
@ 2013-10-02  8:02 ` Jani Nikula
  2013-10-02 14:54   ` Jesse Barnes
  2013-10-02 17:34 ` [PATCH] drm/i915: disable LVDS clock gating on CPT v2 Jesse Barnes
  2 siblings, 1 reply; 8+ messages in thread
From: Jani Nikula @ 2013-10-02  8:02 UTC (permalink / raw)
  To: Jesse Barnes, intel-gfx

On Tue, 01 Oct 2013, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> Needed to prevent display corruption in high res panels.

Clueless question, could we do this only when we have a high res panel
connected? More trouble than it's worth?

BR,
Jani.


>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_reg.h |    2 ++
>  drivers/gpu/drm/i915/intel_pm.c |    4 +++-
>  2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 96fd2ce..cca670a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4338,7 +4338,9 @@
>  #define FDI_RX_CHICKEN(pipe) _PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN)
>  
>  #define SOUTH_DSPCLK_GATE_D	0xc2020
> +#define  PCH_LVDSUNIT_CLOCK_GATE_DISABLE (1<<30)
>  #define  PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29)
> +#define  PCH_LVDSUNIT2_CLOCK_GATE_DISABLE (1<<14)
>  #define  PCH_LP_PARTITION_LEVEL_DISABLE  (1<<12)
>  
>  /* CPU: FDI_TX */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 698257c..f6765e0 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4791,7 +4791,9 @@ static void cpt_init_clock_gating(struct drm_device *dev)
>  	 * gating for the panel power sequencer or it will fail to
>  	 * start up when no ports are active.
>  	 */
> -	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
> +	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE |
> +		   PCH_LVDSUNIT_CLOCK_GATE_DISABLE |
> +		   PCH_LVDSUNIT2_CLOCK_GATE_DISABLE);
>  	I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |
>  		   DPLS_EDP_PPS_FIX_DIS);
>  	/* The below fixes the weird display corruption, a few pixels shifted
> -- 
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915: disable LVDS clock gating on CPT
  2013-10-02  8:02 ` Jani Nikula
@ 2013-10-02 14:54   ` Jesse Barnes
  0 siblings, 0 replies; 8+ messages in thread
From: Jesse Barnes @ 2013-10-02 14:54 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx

On Wed, 02 Oct 2013 11:02:29 +0300
Jani Nikula <jani.nikula@linux.intel.com> wrote:

> On Tue, 01 Oct 2013, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > Needed to prevent display corruption in high res panels.
> 
> Clueless question, could we do this only when we have a high res panel
> connected? More trouble than it's worth?

Probably more trouble than it's worth... plus it may apply to lower res
panels too, I'm not sure since I don't have the full errata info.

Jesse

^ permalink raw reply	[flat|nested] 8+ messages in thread
* [PATCH] drm/i915: disable LVDS clock gating on CPT v2
  2013-10-01 20:18 [PATCH] drm/i915: disable LVDS clock gating on CPT Jesse Barnes
  2013-10-01 21:05 ` Rodrigo Vivi
  2013-10-02  8:02 ` Jani Nikula
@ 2013-10-02 17:34 ` Jesse Barnes
  2013-10-07 16:27   ` Jesse Barnes
  2 siblings, 1 reply; 8+ messages in thread
From: Jesse Barnes @ 2013-10-02 17:34 UTC (permalink / raw)
  To: intel-gfx

Needed to prevent display corruption in high res panels.

v2: use correct unit names (Rodrigo)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_reg.h |    2 ++
 drivers/gpu/drm/i915/intel_pm.c |    4 +++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 96fd2ce..b6312d9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4338,7 +4338,9 @@
 #define FDI_RX_CHICKEN(pipe) _PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN)
 
 #define SOUTH_DSPCLK_GATE_D	0xc2020
+#define  PCH_DPLUNIT_CLOCK_GATE_DISABLE (1<<30)
 #define  PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29)
+#define  PCH_CPUNIT_CLOCK_GATE_DISABLE (1<<14)
 #define  PCH_LP_PARTITION_LEVEL_DISABLE  (1<<12)
 
 /* CPU: FDI_TX */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 698257c..9443f8e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4791,7 +4791,9 @@ static void cpt_init_clock_gating(struct drm_device *dev)
 	 * gating for the panel power sequencer or it will fail to
 	 * start up when no ports are active.
 	 */
-	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
+	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE |
+		   PCH_DPLUNIT_CLOCK_GATE_DISABLE |
+		   PCH_CPUNIT_CLOCK_GATE_DISABLE);
 	I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |
 		   DPLS_EDP_PPS_FIX_DIS);
 	/* The below fixes the weird display corruption, a few pixels shifted
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915: disable LVDS clock gating on CPT v2
  2013-10-02 17:34 ` [PATCH] drm/i915: disable LVDS clock gating on CPT v2 Jesse Barnes
@ 2013-10-07 16:27   ` Jesse Barnes
  2013-10-07 17:39     ` Rodrigo Vivi
  0 siblings, 1 reply; 8+ messages in thread
From: Jesse Barnes @ 2013-10-07 16:27 UTC (permalink / raw)
  Cc: Ulrich Drepper, intel-gfx

Doesn't completely fix Uli's machine, but apparently it helps a bit, so:

Tested-by:  Ulrich Drepper <drepper@gmail.com>

On Wed,  2 Oct 2013 10:34:19 -0700
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> Needed to prevent display corruption in high res panels.
> 
> v2: use correct unit names (Rodrigo)
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_reg.h |    2 ++
>  drivers/gpu/drm/i915/intel_pm.c |    4 +++-
>  2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 96fd2ce..b6312d9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4338,7 +4338,9 @@
>  #define FDI_RX_CHICKEN(pipe) _PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN)
>  
>  #define SOUTH_DSPCLK_GATE_D	0xc2020
> +#define  PCH_DPLUNIT_CLOCK_GATE_DISABLE (1<<30)
>  #define  PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29)
> +#define  PCH_CPUNIT_CLOCK_GATE_DISABLE (1<<14)
>  #define  PCH_LP_PARTITION_LEVEL_DISABLE  (1<<12)
>  
>  /* CPU: FDI_TX */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 698257c..9443f8e 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4791,7 +4791,9 @@ static void cpt_init_clock_gating(struct drm_device *dev)
>  	 * gating for the panel power sequencer or it will fail to
>  	 * start up when no ports are active.
>  	 */
> -	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
> +	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE |
> +		   PCH_DPLUNIT_CLOCK_GATE_DISABLE |
> +		   PCH_CPUNIT_CLOCK_GATE_DISABLE);
>  	I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |
>  		   DPLS_EDP_PPS_FIX_DIS);
>  	/* The below fixes the weird display corruption, a few pixels shifted


-- 
Jesse Barnes, Intel Open Source Technology Center

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915: disable LVDS clock gating on CPT v2
  2013-10-07 16:27   ` Jesse Barnes
@ 2013-10-07 17:39     ` Rodrigo Vivi
  2013-10-07 17:42       ` Daniel Vetter
  0 siblings, 1 reply; 8+ messages in thread
From: Rodrigo Vivi @ 2013-10-07 17:39 UTC (permalink / raw)
  To: Jesse Barnes; +Cc: Ulrich Drepper, intel-gfx

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Mon, Oct 7, 2013 at 1:27 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> Doesn't completely fix Uli's machine, but apparently it helps a bit, so:
>
> Tested-by:  Ulrich Drepper <drepper@gmail.com>
>
> On Wed,  2 Oct 2013 10:34:19 -0700
> Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>
>> Needed to prevent display corruption in high res panels.
>>
>> v2: use correct unit names (Rodrigo)
>>
>> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
>> ---
>>  drivers/gpu/drm/i915/i915_reg.h |    2 ++
>>  drivers/gpu/drm/i915/intel_pm.c |    4 +++-
>>  2 files changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index 96fd2ce..b6312d9 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -4338,7 +4338,9 @@
>>  #define FDI_RX_CHICKEN(pipe) _PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN)
>>
>>  #define SOUTH_DSPCLK_GATE_D  0xc2020
>> +#define  PCH_DPLUNIT_CLOCK_GATE_DISABLE (1<<30)
>>  #define  PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29)
>> +#define  PCH_CPUNIT_CLOCK_GATE_DISABLE (1<<14)
>>  #define  PCH_LP_PARTITION_LEVEL_DISABLE  (1<<12)
>>
>>  /* CPU: FDI_TX */
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index 698257c..9443f8e 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -4791,7 +4791,9 @@ static void cpt_init_clock_gating(struct drm_device *dev)
>>        * gating for the panel power sequencer or it will fail to
>>        * start up when no ports are active.
>>        */
>> -     I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
>> +     I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE |
>> +                PCH_DPLUNIT_CLOCK_GATE_DISABLE |
>> +                PCH_CPUNIT_CLOCK_GATE_DISABLE);
>>       I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |
>>                  DPLS_EDP_PPS_FIX_DIS);
>>       /* The below fixes the weird display corruption, a few pixels shifted
>
>
> --
> Jesse Barnes, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915: disable LVDS clock gating on CPT v2
  2013-10-07 17:39     ` Rodrigo Vivi
@ 2013-10-07 17:42       ` Daniel Vetter
  0 siblings, 0 replies; 8+ messages in thread
From: Daniel Vetter @ 2013-10-07 17:42 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: Ulrich Drepper, intel-gfx

On Mon, Oct 07, 2013 at 02:39:22PM -0300, Rodrigo Vivi wrote:
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> 
> On Mon, Oct 7, 2013 at 1:27 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > Doesn't completely fix Uli's machine, but apparently it helps a bit, so:
> >
> > Tested-by:  Ulrich Drepper <drepper@gmail.com>
> >
> > On Wed,  2 Oct 2013 10:34:19 -0700
> > Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> >
> >> Needed to prevent display corruption in high res panels.
> >>
> >> v2: use correct unit names (Rodrigo)
> >>
> >> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Picked up for -fixes, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2013-10-07 17:42 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-10-01 20:18 [PATCH] drm/i915: disable LVDS clock gating on CPT Jesse Barnes
2013-10-01 21:05 ` Rodrigo Vivi
2013-10-02  8:02 ` Jani Nikula
2013-10-02 14:54   ` Jesse Barnes
2013-10-02 17:34 ` [PATCH] drm/i915: disable LVDS clock gating on CPT v2 Jesse Barnes
2013-10-07 16:27   ` Jesse Barnes
2013-10-07 17:39     ` Rodrigo Vivi
2013-10-07 17:42       ` Daniel Vetter

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