Re: [PATCH] drm/i915: disable LVDS clock gating on CPT

Jani Nikula
2013-10-02T07:59:58Z

On Tue, 01 Oct 2013, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> Needed to prevent display corruption in high res panels.

Clueless question, could we do this only when we have a high res panel
connected? More trouble than it's worth?

BR,
Jani.

>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> drivers/gpu/drm/i915/intel_pm.c | 4 +++-
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 96fd2ce..cca670a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4338,7 +4338,9 @@
> #define FDI_RX_CHICKEN(pipe) _PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN)
>
> #define SOUTH_DSPCLK_GATE_D 0xc2020
> +#define PCH_LVDSUNIT_CLOCK_GATE_DISABLE (1<<30)
> #define PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29)
> +#define PCH_LVDSUNIT2_CLOCK_GATE_DISABLE (1<<14)
> #define PCH_LP_PARTITION_LEVEL_DISABLE (1<<12)
>
> /* CPU: FDI_TX */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 698257c..f6765e0 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4791,7 +4791,9 @@ static void cpt_init_clock_gating(struct drm_device *dev)
> * gating for the panel power sequencer or it will fail to
> * start up when no ports are active.
> */
> - I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
> + I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE |
> + PCH_LVDSUNIT_CLOCK_GATE_DISABLE |
> + PCH_LVDSUNIT2_CLOCK_GATE_DISABLE);
> I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |
> DPLS_EDP_PPS_FIX_DIS);
> /* The below fixes the weird display corruption, a few pixels shifted
> --
> 1.7.9.5
>
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--
Jani Nikula, Intel Open Source Technology Center