From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH 07/16] drm/i915: Refactor wm_lp to level
 calculation
Date: Fri, 11 Oct 2013 11:10:30 +0300
Message-ID: <20131011081030.GQ13047@intel.com>
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To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
List-Id: intel-gfx@lists.freedesktop.org

On Thu, Oct 10, 2013 at 07:42:22PM -0300, Paulo Zanoni wrote:
> 2013/10/9  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> >
> > On HSW the LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4. We make the
> > conversion from LPn to to the level at one point current. Later we're
> > going to do it in a few places, so move it to a separate function.
> =

> I guess this function will work on ILK/SNB/IVB even though they don't
> follow this rule, right? If yes: Reviewed-by: Paulo Zanoni
> <paulo.r.zanoni@intel.com>

Yes, level 4 is never enabled on those, so we never do the +1.

> =

> >
> > Signed-off-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/int=
el_pm.c
> > index c17518d..d307039 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -2705,6 +2705,12 @@ static void ilk_wm_merge(struct drm_device *dev,
> >         }
> >  }
> >
> > +static int ilk_wm_lp_to_level(int wm_lp, const struct intel_pipe_wm *p=
ipe_wm)
> > +{
> > +       /* LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4 */
> > +       return wm_lp + (wm_lp >=3D 2 && pipe_wm->wm[4].enable);
> > +}
> > +
> >  static void hsw_compute_wm_results(struct drm_device *dev,
> >                                    const struct intel_pipe_wm *merged,
> >                                    struct hsw_wm_values *results)
> > @@ -2718,7 +2724,7 @@ static void hsw_compute_wm_results(struct drm_dev=
ice *dev,
> >         for (wm_lp =3D 1; wm_lp <=3D 3; wm_lp++) {
> >                 const struct intel_wm_level *r;
> >
> > -               level =3D wm_lp + (wm_lp >=3D 2 && merged->wm[4].enable=
);
> > +               level =3D ilk_wm_lp_to_level(wm_lp, merged);
> >
> >                 r =3D &merged->wm[level];
> >                 if (!r->enable)
> > --
> > 1.8.1.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> =

> =

> =

> -- =

> Paulo Zanoni

-- =

Ville Syrj=E4l=E4
Intel OTC