From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 04/16] drm/i915: Sample the frame counter instead of a timestamp for CRCs Date: Wed, 16 Oct 2013 16:58:30 +0300 Message-ID: <20131016135830.GZ13047@intel.com> References: <1381859742-24887-1-git-send-email-damien.lespiau@intel.com> <1381859742-24887-5-git-send-email-damien.lespiau@intel.com> <20131016132932.GY13047@intel.com> <20131016135140.GK4830@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id AD5F3E7F8F for ; Wed, 16 Oct 2013 06:59:03 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20131016135140.GK4830@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Oct 16, 2013 at 03:51:40PM +0200, Daniel Vetter wrote: > On Wed, Oct 16, 2013 at 04:29:32PM +0300, Ville Syrj=E4l=E4 wrote: > > On Tue, Oct 15, 2013 at 06:55:30PM +0100, Damien Lespiau wrote: > > > Signed-off-by: Damien Lespiau > > > --- > > > drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- > > > drivers/gpu/drm/i915/i915_drv.h | 2 +- > > > drivers/gpu/drm/i915/i915_irq.c | 8 ++------ > > > 3 files changed, 5 insertions(+), 9 deletions(-) > > > = > > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i9= 15/i915_debugfs.c > > > index 991abff..58c6fd4 100644 > > > --- a/drivers/gpu/drm/i915/i915_debugfs.c > > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > > > @@ -1748,14 +1748,14 @@ static int i915_pipe_crc(struct seq_file *m, = void *data) > > > return 0; > > > } > > > = > > > - seq_puts(m, " timestamp CRC1 CRC2 CRC3 CRC4 CRC= 5\n"); > > > + seq_puts(m, " frame CRC1 CRC2 CRC3 CRC4 CRC5\n"= ); > > > head =3D atomic_read(&pipe_crc->head); > > > tail =3D atomic_read(&pipe_crc->tail); > > > = > > > while (CIRC_CNT(head, tail, INTEL_PIPE_CRC_ENTRIES_NR) >=3D 1) { > > > struct intel_pipe_crc_entry *entry =3D &pipe_crc->entries[tail]; > > > = > > > - seq_printf(m, "%12u %8x %8x %8x %8x %8x\n", entry->timestamp, > > > + seq_printf(m, "%8u %8x %8x %8x %8x %8x\n", entry->frame, > > > entry->crc[0], entry->crc[1], entry->crc[2], > > > entry->crc[3], entry->crc[4]); > > > = > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i= 915_drv.h > > > index 7a1ed3a..cd87919 100644 > > > --- a/drivers/gpu/drm/i915/i915_drv.h > > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > > @@ -1228,7 +1228,7 @@ enum intel_pipe_crc_source { > > > }; > > > = > > > struct intel_pipe_crc_entry { > > > - uint32_t timestamp; > > > + uint32_t frame; > > > uint32_t crc[5]; > > > }; > > > = > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i= 915_irq.c > > > index 73d76af..0b21828 100644 > > > --- a/drivers/gpu/drm/i915/i915_irq.c > > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > > @@ -1195,8 +1195,7 @@ static void ivb_pipe_crc_update(struct drm_devi= ce *dev, enum pipe pipe) > > > struct drm_i915_private *dev_priv =3D dev->dev_private; > > > struct intel_pipe_crc *pipe_crc =3D &dev_priv->pipe_crc[pipe]; > > > struct intel_pipe_crc_entry *entry; > > > - ktime_t now; > > > - int ts, head, tail; > > > + int head, tail; > > > = > > > head =3D atomic_read(&pipe_crc->head); > > > tail =3D atomic_read(&pipe_crc->tail); > > > @@ -1208,10 +1207,7 @@ static void ivb_pipe_crc_update(struct drm_dev= ice *dev, enum pipe pipe) > > > = > > > entry =3D &pipe_crc->entries[head]; > > > = > > > - now =3D ktime_get(); > > > - ts =3D ktime_to_us(now); > > > - > > > - entry->timestamp =3D ts; > > > + entry->frame =3D I915_READ(PIPEFRAME(pipe)); > > = > > BTW that's the wrong register for ctg+. It should be PIPE_FRMCOUNT_GM45. > > But it would be better if you just call > > dev->driver->get_vblank_counter(). Then you get the correct answer for > > everything except gen2, and for gen2 we could implement a software > > frame counter if need be. > = > Hm, maybe we should even cobble it out of the drm vblank support code, to > make sure that the vblank frame numbers from the crc debugfs align with > timestamps for pageflips. But this is definitely a good idea. And afaik > gen2 doesn't have crc support (not even gen3 iirc). I'll do this in my > bikeshed series. I see crc registers in both gen2 and 3 bspec. -- = Ville Syrj=E4l=E4 Intel OTC