From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 07/16] drm/i915: crc support for hsw Date: Thu, 17 Oct 2013 15:06:38 +0200 Message-ID: <20131017130638.GU4830@phenom.ffwll.local> References: <1381956961-16875-1-git-send-email-daniel.vetter@ffwll.ch> <1381956961-16875-8-git-send-email-daniel.vetter@ffwll.ch> <20131017105349.GB8272@strange.amr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ea0-f169.google.com (mail-ea0-f169.google.com [209.85.215.169]) by gabe.freedesktop.org (Postfix) with ESMTP id D7F84E692C for ; Thu, 17 Oct 2013 06:06:21 -0700 (PDT) Received: by mail-ea0-f169.google.com with SMTP id k11so1041937eaj.14 for ; Thu, 17 Oct 2013 06:06:19 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20131017105349.GB8272@strange.amr.corp.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Damien Lespiau Cc: Daniel Vetter , Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Thu, Oct 17, 2013 at 11:53:49AM +0100, Damien Lespiau wrote: > On Wed, Oct 16, 2013 at 10:55:52PM +0200, Daniel Vetter wrote: > > hw designers decided to change the CRC registers and coalesce them all > > into one. Otherwise nothing changed. I've opted for a new hsw_ version > > to grab the crc sample since hsw+1 will have the same crc registers, > > but different interrupt source registers. So this little helper > > function will come handy there. > > > > Also refactor the display error handler with a neat pipe loop. > > > > v2: Use for_each_pipe. > > > > Signed-off-by: Daniel Vetter > > Patches 1-7 are: > > Reviewed-by: Damien Lespiau Thanks for the review, I've merged the patches thus far. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch