From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 12/16] drm/i915: Fix PIPE_CRC_CTL for vlv Date: Mon, 21 Oct 2013 13:50:03 +0300 Message-ID: <20131021105003.GU13047@intel.com> References: <1381956961-16875-1-git-send-email-daniel.vetter@ffwll.ch> <1381956961-16875-13-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id AA41CE6920 for ; Mon, 21 Oct 2013 03:50:08 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1381956961-16875-13-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Wed, Oct 16, 2013 at 10:55:57PM +0200, Daniel Vetter wrote: > The PIPE_B #define was missing the display mmio offset. Use the > _PIPE_INC macro instead, it's simpler. > = > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_= reg.h > index ad8fe21..4e0f0b7 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1887,14 +1887,13 @@ > #define _PIPE_CRC_RES_RES2_A_G4X (dev_priv->info->display_mmio_offset + = 0x60080) > = > /* Pipe B CRC regs */ > -#define _PIPE_CRC_CTL_B 0x61050 > #define _PIPE_CRC_RES_1_B_IVB 0x61064 > #define _PIPE_CRC_RES_2_B_IVB 0x61068 > #define _PIPE_CRC_RES_3_B_IVB 0x6106c > #define _PIPE_CRC_RES_4_B_IVB 0x61070 > #define _PIPE_CRC_RES_5_B_IVB 0x61074 Maybe use _PIPE_INC() for these IVB regs as well. They're the only CRC regs left using _PIPE(), so they feel a bit out of place. > = > -#define PIPE_CRC_CTL(pipe) _PIPE(pipe, _PIPE_CRC_CTL_A, _PIPE_CRC_CTL_B) > +#define PIPE_CRC_CTL(pipe) _PIPE_INC(pipe, _PIPE_CRC_CTL_A, 0x01000) > #define PIPE_CRC_RES_1_IVB(pipe) \ > _PIPE(pipe, _PIPE_CRC_RES_1_A_IVB, _PIPE_CRC_RES_1_B_IVB) > #define PIPE_CRC_RES_2_IVB(pipe) \ > -- = > 1.8.4.rc3 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC