From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915/vlv: Fix typo in the DPIO register define. Date: Thu, 31 Oct 2013 13:05:09 +0100 Message-ID: <20131031120509.GI4167@phenom.ffwll.local> References: <1383098719-648-1-git-send-email-chon.ming.lee@intel.com> <20131031114631.GA13047@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ee0-f52.google.com (mail-ee0-f52.google.com [74.125.83.52]) by gabe.freedesktop.org (Postfix) with ESMTP id 3E0FCEFC38 for ; Thu, 31 Oct 2013 05:04:44 -0700 (PDT) Received: by mail-ee0-f52.google.com with SMTP id e49so1297384eek.25 for ; Thu, 31 Oct 2013 05:04:41 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20131031114631.GA13047@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Oct 31, 2013 at 01:46:31PM +0200, Ville Syrj=E4l=E4 wrote: > On Wed, Oct 30, 2013 at 10:05:19AM +0800, Chon Ming Lee wrote: > > Incorrect definition DPIO_TX3_SWING_CTL4. > > = > > Signed-off-by: Chon Ming Lee > = > Reviewed-by: Ville Syrj=E4l=E4 Queued for -next, thanks for the patch. = > Based on the specs, the typo meant that HDMI B ended up using > "incorrect" de-emphasis for the TMDS data lanes. I've added this explanation to the commit message to describe the impact a bit better. Next time around please elaborate a bit more about the impact of a change so other people have an idea how important a patch is or whether it might help for a given issue they have. Thanks, Daniel > = > > --- > > drivers/gpu/drm/i915/i915_reg.h | 2 +- > > 1 files changed, 1 insertions(+), 1 deletions(-) > > = > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i91= 5_reg.h > > index 6799d53..f7ecad2 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -444,7 +444,7 @@ > > = > > #define _DPIO_TX3_SWING_CTL4_A 0x690 > > #define _DPIO_TX3_SWING_CTL4_B 0x2a90 > > -#define DPIO_TX3_SWING_CTL4(pipe) _PIPE(pipe, _DPIO_TX_SWING_CTL4_A, \ > > +#define DPIO_TX3_SWING_CTL4(pipe) _PIPE(pipe, _DPIO_TX3_SWING_CTL4_A, \ > > _DPIO_TX3_SWING_CTL4_B) > > = > > /* > > -- = > > 1.7.7.6 > > = > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > = > -- = > Ville Syrj=E4l=E4 > Intel OTC > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch