From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 39/62] drm/i915/bdw: on Broadwell, the panel fitter is on the pipe Date: Sun, 3 Nov 2013 13:19:50 +0200 Message-ID: <20131103111950.GO13047@intel.com> References: <1383451680-11173-1-git-send-email-benjamin.widawsky@intel.com> <1383451680-11173-40-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id AEC65EE762 for ; Sun, 3 Nov 2013 03:19:54 -0800 (PST) Content-Disposition: inline In-Reply-To: <1383451680-11173-40-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Ben Widawsky Cc: Daniel Vetter , Intel GFX , Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Sat, Nov 02, 2013 at 09:07:37PM -0700, Ben Widawsky wrote: > From: Paulo Zanoni > = > So you can use the panel fitter while the power well is disabled and > you also don't need to set the "pipe" bit. > = > v2: Rebased on top of Jesse's pfit refactor, which moved pfit state > into the pipe_config. > = > v3: Rebase on top of the latest Haswell/panel fitter rework, which > neatly resolves a FIXME we have in this patch here: > = > v4: Rebase on top of the new power domain framework. > = > Signed-off-by: Paulo Zanoni (v1) > Signed-off-by: Daniel Vetter Reviewed-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/intel_ddi.c | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/inte= l_ddi.c > index d464fd2..db848a9 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -756,7 +756,8 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc= *crtc) > struct intel_crtc *intel_crtc =3D to_intel_crtc(crtc); > struct intel_encoder *intel_encoder =3D intel_ddi_get_crtc_encoder(crtc= ); > struct drm_encoder *encoder =3D &intel_encoder->base; > - struct drm_i915_private *dev_priv =3D crtc->dev->dev_private; > + struct drm_device *dev =3D crtc->dev; > + struct drm_i915_private *dev_priv =3D dev->dev_private; > enum pipe pipe =3D intel_crtc->pipe; > enum transcoder cpu_transcoder =3D intel_crtc->config.cpu_transcoder; > enum port port =3D intel_ddi_get_encoder_port(intel_encoder); > @@ -792,10 +793,11 @@ void intel_ddi_enable_transcoder_func(struct drm_cr= tc *crtc) > if (cpu_transcoder =3D=3D TRANSCODER_EDP) { > switch (pipe) { > case PIPE_A: > - /* Can only use the always-on power well for eDP when > - * not using the panel fitter, and when not using motion > - * blur mitigation (which we don't support). */ > - if (intel_crtc->config.pch_pfit.enabled) > + /* On Haswell, can only use the always-on power well for > + * eDP when not using the panel fitter, and when not > + * using motion blur mitigation (which we don't > + * support). */ > + if (IS_HASWELL(dev) && intel_crtc->config.pch_pfit.enabled) > temp |=3D TRANS_DDI_EDP_INPUT_A_ONOFF; > else > temp |=3D TRANS_DDI_EDP_INPUT_A_ON; > -- = > 1.8.4.2 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC