From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 42/62] drm/i915/bdw: Implement WaSwitchSolVfFArbitrationPriority Date: Mon, 4 Nov 2013 16:23:27 +0200 Message-ID: <20131104142327.GR13047@intel.com> References: <1383451680-11173-1-git-send-email-benjamin.widawsky@intel.com> <1383451680-11173-43-git-send-email-benjamin.widawsky@intel.com> <20131103110758.GL13047@intel.com> <20131103174455.GA3447@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 010BE132005 for ; Mon, 4 Nov 2013 06:23:41 -0800 (PST) Content-Disposition: inline In-Reply-To: <20131103174455.GA3447@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Ben Widawsky Cc: Intel GFX , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org On Sun, Nov 03, 2013 at 09:44:56AM -0800, Ben Widawsky wrote: > On Sun, Nov 03, 2013 at 01:07:58PM +0200, Ville Syrj=E4l=E4 wrote: > > On Sat, Nov 02, 2013 at 09:07:40PM -0700, Ben Widawsky wrote: > > > GEN8 also needs this workaround. > > = > > Not according to the w/a database. > > = > > But the register description is the same for both HSW and BDW. Also for > > HSW, the w/a doesn't actually say whether we should set or clear the bi= t. > > the default is listed to be 0, so I guess we should set it, but then > > it's unclear why BDW wouldn't need the w/a. Once again a very poorly > > docuemnted w/a :( > = > Just an FYI: all workarounds for Broadwell came from the bspec, as the > workaround database did not exist for Broadwell at that time. > = > Also, I was informally told not to trust the workaround database yet. I can't find this w/a in bspec either, not even for HSW. -- = Ville Syrj=E4l=E4 Intel OTC